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Searched refs:stream_descriptors (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/
A Ddml2_pmo_dcn3.c216 if (memcmp(&display_config->display_config.stream_descriptors[remap_array[i - 1]].timing, in are_timings_trivially_synchronizable()
217 &display_config->display_config.stream_descriptors[remap_array[i]].timing, in are_timings_trivially_synchronizable()
225 if (display_config->display_config.stream_descriptors[remap_array[i]].timing.drr_config.enabled) { in are_timings_trivially_synchronizable()
309 if (display_config->stream_descriptors[i].overrides.disable_dynamic_odm) in pmo_dcn3_init_for_vmin()
318 else if (!is_h_timing_divisible_by(&display_config->stream_descriptors[i].timing, 2)) in pmo_dcn3_init_for_vmin()
324 else if (!is_dp_encoder(display_config->stream_descriptors[i].output.output_encoder)) in pmo_dcn3_init_for_vmin()
351 odm_load = display_config->stream_descriptors[i].timing.pixel_clock_khz in find_highest_odm_load_stream_index()
395 …stream_descriptor = &in_out->optimized_display_config->display_config.stream_descriptors[stream_in… in pmo_dcn3_optimize_for_vmin()
409 if (is_h_timing_divisible_by(&display_config->stream_descriptors[stream_index].timing, 4)) { in pmo_dcn3_optimize_for_vmin()
428 if (is_h_timing_divisible_by(&display_config->stream_descriptors[stream_index].timing, 4)) { in pmo_dcn3_optimize_for_vmin()
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A Ddml2_pmo_dcn4_fams2.c773 if (display_config->stream_descriptors[i].overrides.disable_dynamic_odm) in pmo_dcn4_fams2_init_for_vmin()
782 else if (!is_h_timing_divisible_by(&display_config->stream_descriptors[i].timing, 2)) in pmo_dcn4_fams2_init_for_vmin()
788 else if (!is_dp_encoder(display_config->stream_descriptors[i].output.output_encoder)) in pmo_dcn4_fams2_init_for_vmin()
817 odm_load = display_config->stream_descriptors[i].timing.pixel_clock_khz in find_highest_odm_load_stream_index()
875 if (is_h_timing_divisible_by(&display_config->stream_descriptors[stream_index].timing, 4)) { in pmo_dcn4_fams2_optimize_for_vmin()
894 if (is_h_timing_divisible_by(&display_config->stream_descriptors[stream_index].timing, 4)) { in pmo_dcn4_fams2_optimize_for_vmin()
953 master_timing = &display_config->display_config.stream_descriptors[i].timing; in build_synchronized_timing_groups()
978 &display_config->display_config.stream_descriptors[j].timing, in build_synchronized_timing_groups()
1048 stream_descriptor = &display_config->display_config.stream_descriptors[i]; in all_timings_support_drr()
1126 stream_descriptor = &display_config->display_config.stream_descriptors[i]; in all_timings_support_svp()
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/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
A Ddml2_core_dcn4_calcs.c1104 l->TotalPixelRate += display_cfg->stream_descriptors[k].timing.pixel_clock_khz; in CalculateDETBufferSize()
6958 ((double)p->display_cfg->stream_descriptors[stream_index].timing.h_total / in calculate_bytes_to_fetch_required_to_hide_latency()
7423 …ank = display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.v_tot… in dml_core_ms_prefetch_check()
9168 &display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing, in dml_core_mode_support()
10245 if (p->display_cfg->stream_descriptors[k].writeback.active_writebacks_per_stream > 0) in CalculateStutterEfficiency()
11110 &display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing, in dml_core_mode_programming()
11856 …display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.v_total) - … in dml_core_mode_programming()
11896 if (display_cfg->stream_descriptors[k].writeback.active_writebacks_per_stream > 0) { in dml_core_mode_programming()
11898 * display_cfg->stream_descriptors[k].writeback.writeback_stream[0].output_width / in dml_core_mode_programming()
11899 …(display_cfg->stream_descriptors[k].timing.h_total * display_cfg->stream_descriptors[k].writeback.… in dml_core_mode_programming()
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A Ddml2_core_utils.c338 …double bpc = (double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_inde… in dml2_core_utils_get_stream_output_bpp()
339 …if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.dsc.ena… in dml2_core_utils_get_stream_output_bpp()
340 …switch (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].output.out… in dml2_core_utils_get_stream_output_bpp()
355 …} else if (display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_index].timing.… in dml2_core_utils_get_stream_output_bpp()
356 …out_bpp[k] = (double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].stream_inde… in dml2_core_utils_get_stream_output_bpp()
362 …DML_LOG_VERBOSE("DML::%s: k=%d dsc.enable=%d\n", __func__, k, display_cfg->stream_descriptors[disp… in dml2_core_utils_get_stream_output_bpp()
631 main_stream = &display_cfg->display_config.stream_descriptors[stream_index]; in dml2_core_utils_expand_implict_subvp()
637 …create_phantom_stream_from_main_stream(&svp_expanded_display_cfg->stream_descriptors[svp_expanded_… in dml2_core_utils_expand_implict_subvp()
654 main_stream = &display_cfg->display_config.stream_descriptors[main_plane->stream_index]; in dml2_core_utils_expand_implict_subvp()
655 …phantom_stream = &svp_expanded_display_cfg->stream_descriptors[scratch->svp_stream_index_from_main… in dml2_core_utils_expand_implict_subvp()
A Ddml2_core_dcn4.c212 main_stream = &display_cfg->display_config.stream_descriptors[stream_index]; in expand_implict_subvp()
218 …create_phantom_stream_from_main_stream(&svp_expanded_display_cfg->stream_descriptors[svp_expanded_… in expand_implict_subvp()
235 main_stream = &display_cfg->display_config.stream_descriptors[main_plane->stream_index]; in expand_implict_subvp()
236 …phantom_stream = &svp_expanded_display_cfg->stream_descriptors[scratch->svp_stream_index_from_main… in expand_implict_subvp()
283 main_stream = &svp_expanded_display_cfg->stream_descriptors[stream_index]; in pack_mode_programming_params_with_implicit_subvp()
284 …phantom_stream = &svp_expanded_display_cfg->stream_descriptors[scratch->svp_stream_index_from_main… in pack_mode_programming_params_with_implicit_subvp()
287 …ing[stream_index].stream_descriptor = &programming->display_config.stream_descriptors[stream_index… in pack_mode_programming_params_with_implicit_subvp()
617 …am_index].stream_descriptor = &in_out->programming->display_config.stream_descriptors[main_stream_… in core_dcn4_mode_programming()
/drivers/gpu/drm/amd/display/dc/dml2/dml21/
A Ddml21_translation_helper.c1100 …populate_dml21_timing_config_from_stream_state(&dml_dispcfg->stream_descriptors[disp_cfg_stream_lo… in dml21_map_dc_state_into_dml_display_cfg()
1101 …adjust_dml21_hblank_timing_config_from_pipe_ctx(&dml_dispcfg->stream_descriptors[disp_cfg_stream_l… in dml21_map_dc_state_into_dml_display_cfg()
1102 …populate_dml21_output_config_from_stream_state(&dml_dispcfg->stream_descriptors[disp_cfg_stream_lo… in dml21_map_dc_state_into_dml_display_cfg()
1103 …populate_dml21_stream_overrides_from_stream_state(&dml_dispcfg->stream_descriptors[disp_cfg_stream… in dml21_map_dc_state_into_dml_display_cfg()
1105 …dml_dispcfg->stream_descriptors[disp_cfg_stream_location].overrides.hw.twait_budgeting.fclk_pstate… in dml21_map_dc_state_into_dml_display_cfg()
1106 …dml_dispcfg->stream_descriptors[disp_cfg_stream_location].overrides.hw.twait_budgeting.uclk_pstate… in dml21_map_dc_state_into_dml_display_cfg()
1107 …dml_dispcfg->stream_descriptors[disp_cfg_stream_location].overrides.hw.twait_budgeting.stutter_ent… in dml21_map_dc_state_into_dml_display_cfg()
/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/
A Ddml_top_display_cfg_types.h441 struct dml2_stream_parameters stream_descriptors[DML2_MAX_PLANES]; member
/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/
A Ddml2_dpmm_dcn4.c436 …if (memcmp(&display_config->stream_descriptors[remap_array[i - 1]].timing, &display_config->stream… in are_timings_trivially_synchronizable()
444 if (display_config->stream_descriptors[remap_array[i]].timing.drr_config.enabled) { in are_timings_trivially_synchronizable()
/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/
A Ddml2_top_soc15.c536 stream = &params->display_cfg->stream_descriptors[plane->stream_index]; in dml2_top_mcache_validate_admissability()

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