| /drivers/gpu/drm/i915/gt/ |
| A D | intel_sseu.h | 123 int subslice) in intel_sseu_has_subslice() argument
126 subslice >= sseu->max_subslices) in intel_sseu_has_subslice()
130 return test_bit(subslice, sseu->subslice_mask.xehp); in intel_sseu_has_subslice()
132 return sseu->subslice_mask.hsw[slice] & BIT(subslice); in intel_sseu_has_subslice()
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| A D | intel_workarounds.c | 1118 unsigned int slice, subslice; in gen9_wa_init_mcr() local
1137 GEM_BUG_ON(!subslice); in gen9_wa_init_mcr()
1138 subslice--; in gen9_wa_init_mcr()
1246 unsigned int slice, unsigned int subslice) in __set_mcr_steering() argument
1266 unsigned int slice, unsigned int subslice) in __add_mcr_wa() argument
1271 gt->default_steering.instanceid = subslice; in __add_mcr_wa()
1280 unsigned int subslice; in icl_wa_init_mcr() local
1301 if (gt->info.l3bank_mask & BIT(subslice)) in icl_wa_init_mcr()
1304 __add_mcr_wa(gt, wal, 0, subslice); in icl_wa_init_mcr()
1311 unsigned long slice, subslice = 0, slice_mask = 0; in xehp_init_mcr() local
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| A D | intel_sseu.c | 48 int subslice) in sseu_get_eus() argument
52 return sseu->eu_mask.xehp[subslice]; in sseu_get_eus()
54 return sseu->eu_mask.hsw[slice][subslice]; in sseu_get_eus()
58 static void sseu_set_eus(struct sseu_dev_info *sseu, int slice, int subslice, in sseu_set_eus() argument
64 sseu->eu_mask.xehp[subslice] = eu_mask; in sseu_set_eus()
66 sseu->eu_mask.hsw[slice][subslice] = eu_mask; in sseu_set_eus()
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| A D | intel_engine_cs.c | 1777 int subslice; in intel_engine_get_instdone() local
1798 for_each_ss_steering(iter, engine->gt, slice, subslice) { in intel_engine_get_instdone()
1799 instdone->sampler[slice][subslice] = in intel_engine_get_instdone()
1802 slice, subslice); in intel_engine_get_instdone()
1803 instdone->row[slice][subslice] = in intel_engine_get_instdone()
1806 slice, subslice); in intel_engine_get_instdone()
1810 for_each_ss_steering(iter, engine->gt, slice, subslice) in intel_engine_get_instdone()
1811 instdone->geom_svg[slice][subslice] = in intel_engine_get_instdone()
1814 slice, subslice); in intel_engine_get_instdone()
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| A D | intel_gt_regs.h | 73 #define GEN8_MCR_SUBSLICE(subslice) (((subslice) & 3) << 24) argument
78 #define GEN11_MCR_SUBSLICE(subslice) (((subslice) & 0x7) << 24) argument
515 #define GEN9_PGCTL_SS_ACK(subslice) REG_BIT(2 + (subslice) * 2) argument
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| /drivers/gpu/drm/xe/ |
| A D | xe_trace.h | 431 TP_PROTO(u8 slice, u8 subslice,
434 TP_ARGS(slice, subslice,
439 __field(u8, subslice)
447 __entry->subslice = subslice;
455 __entry->slice, __entry->subslice,
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| A D | xe_guc_capture.c | 400 u16 slice, subslice; in guc_capture_alloc_steered_lists() local
458 for_each_dss_steering(dss, gt, slice, subslice) { in guc_capture_alloc_steered_lists()
460 __fill_ext_reg(extarray, &xe_extregs[i], dss, slice, subslice); in guc_capture_alloc_steered_lists()
466 __fill_ext_reg(extarray, &xehpg_extregs[i], dss, slice, subslice); in guc_capture_alloc_steered_lists()
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| /drivers/gpu/drm/i915/ |
| A D | i915_gpu_error.c | 443 int subslice; in error_print_instdone() local
458 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) in error_print_instdone()
460 slice, subslice, in error_print_instdone()
461 ee->instdone.sampler[slice][subslice]); in error_print_instdone()
463 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) in error_print_instdone()
465 slice, subslice, in error_print_instdone()
466 ee->instdone.row[slice][subslice]); in error_print_instdone()
472 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) in error_print_instdone()
474 slice, subslice, in error_print_instdone()
475 ee->instdone.geom_svg[slice][subslice]); in error_print_instdone()
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| /drivers/gpu/drm/i915/gt/uc/ |
| A D | intel_guc_capture.c | 296 int slice, subslice, iter, i, num_steer_regs, num_tot_regs = 0; in guc_capture_alloc_steered_lists() local
316 for_each_ss_steering(iter, gt, slice, subslice) in guc_capture_alloc_steered_lists()
333 for_each_ss_steering(iter, gt, slice, subslice) { in guc_capture_alloc_steered_lists()
335 __fill_ext_reg(extarray, &gen8_extregs[i], slice, subslice); in guc_capture_alloc_steered_lists()
341 __fill_ext_reg(extarray, &xehpg_extregs[i], slice, subslice); in guc_capture_alloc_steered_lists()
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| /drivers/gpu/drm/xe/regs/ |
| A D | xe_gt_regs.h | 54 #define MCR_SUBSLICE(subslice) REG_FIELD_PREP(MCR_SUBSLICE_MASK, subslice) argument
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