| /drivers/gpu/drm/qxl/ |
| A D | qxl_cmd.c | 335 if (surf->is_primary) in qxl_io_update_area() 339 surface_width = surf->surf.width; in qxl_io_update_area() 340 surface_height = surf->surf.height; in qxl_io_update_area() 481 cmd->u.surface_create.format = surf->surf.format; in qxl_hw_surface_alloc() 482 cmd->u.surface_create.width = surf->surf.width; in qxl_hw_surface_alloc() 483 cmd->u.surface_create.height = surf->surf.height; in qxl_hw_surface_alloc() 484 cmd->u.surface_create.stride = surf->surf.stride; in qxl_hw_surface_alloc() 499 idr_replace(&qdev->surf_id_idr, surf, surf->surface_id); in qxl_hw_surface_alloc() 529 surf->surface_id = 0; in qxl_hw_surface_dealloc() 551 rect.right = surf->surf.width; in qxl_update_surface() [all …]
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| A D | qxl_dumb.c | 40 struct qxl_surface surf; in qxl_mode_dumb_create() local 58 surf.width = args->width; in qxl_mode_dumb_create() 59 surf.height = args->height; in qxl_mode_dumb_create() 60 surf.stride = pitch; in qxl_mode_dumb_create() 61 surf.format = format; in qxl_mode_dumb_create() 62 surf.data = 0; in qxl_mode_dumb_create() 66 args->size, &surf, &gobj, in qxl_mode_dumb_create()
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| A D | qxl_display.c | 221 return qxl_check_mode(qdev, bo->surf.width, bo->surf.height); in qxl_check_framebuffer() 775 memset(surf, 0, sizeof(*surf)); in qxl_calc_dumb_shadow() 784 surf->width = 64; in qxl_calc_dumb_shadow() 786 surf->height = 64; in qxl_calc_dumb_shadow() 788 surf->stride = surf->width * 4; in qxl_calc_dumb_shadow() 791 qdev->dumb_shadow_bo->surf.width != surf->width || in qxl_calc_dumb_shadow() 792 qdev->dumb_shadow_bo->surf.height != surf->height) in qxl_calc_dumb_shadow() 793 DRM_DEBUG("%dx%d\n", surf->width, surf->height); in qxl_calc_dumb_shadow() 805 qdev->dumb_shadow_bo->surf.width != surf.width || in qxl_prepare_shadow() 806 qdev->dumb_shadow_bo->surf.height != surf.height) { in qxl_prepare_shadow() [all …]
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| A D | qxl_gem.c | 48 struct qxl_surface *surf, in qxl_gem_object_create() argument 58 r = qxl_bo_create(qdev, size, kernel, false, initial_domain, 0, surf, &qbo); in qxl_gem_object_create() 85 struct qxl_surface *surf, in qxl_gem_object_create_with_handle() argument 96 false, false, surf, in qxl_gem_object_create_with_handle()
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| A D | qxl_drv.h | 90 struct qxl_surface surf; member 303 struct qxl_surface *surf, 309 struct qxl_surface *surf, 352 int qxl_io_update_area(struct qxl_device *qdev, struct qxl_bo *surf, 433 struct qxl_bo *surf); 437 struct qxl_bo *surf); 439 struct qxl_bo *surf); 443 void qxl_surface_evict(struct qxl_device *qdev, struct qxl_bo *surf, bool freeing);
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| A D | qxl_ioctl.c | 389 struct qxl_surface surf; in qxl_alloc_surf_ioctl() local 395 surf.format = param->format; in qxl_alloc_surf_ioctl() 396 surf.width = param->width; in qxl_alloc_surf_ioctl() 397 surf.height = param->height; in qxl_alloc_surf_ioctl() 398 surf.stride = param->stride; in qxl_alloc_surf_ioctl() 399 surf.data = 0; in qxl_alloc_surf_ioctl() 404 &surf, in qxl_alloc_surf_ioctl()
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| A D | qxl_object.c | 106 struct qxl_surface *surf, in qxl_bo_create() argument 133 if (surf) in qxl_bo_create() 134 bo->surf = *surf; in qxl_bo_create()
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| A D | qxl_object.h | 60 struct qxl_surface *surf,
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| /drivers/gpu/drm/radeon/ |
| A D | evergreen_cs.c | 195 surf->layer_size = surf->nbx * surf->nby * surf->bpe * surf->nsamples; in evergreen_surface_check_linear() 210 surf->layer_size = surf->nbx * surf->nby * surf->bpe * surf->nsamples; in evergreen_surface_check_linear_aligned() 233 surf->layer_size = surf->nbx * surf->nby * surf->bpe; in evergreen_surface_check_1d() 462 size = nby * surf.nbx * surf.bpe * surf.nsamples; in evergreen_cs_track_validate_cb() 487 surf.mode, surf.bpe, surf.nsamples, in evergreen_cs_track_validate_cb() 827 surf.nby = ALIGN(surf.nby, surf.halign); in evergreen_cs_track_validate_texture() 859 surf.nbx, surf.nby); in evergreen_cs_track_validate_texture() 885 if (surf.nbx < surf.palign || surf.nby < surf.halign) { in evergreen_cs_track_validate_texture() 900 surf.nbx = ALIGN(surf.nbx, surf.palign); in evergreen_cs_track_validate_texture() 901 surf.nby = ALIGN(surf.nby, surf.halign); in evergreen_cs_track_validate_texture() [all …]
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| /drivers/gpu/drm/vc4/ |
| A D | vc4_render_cl.c | 402 surf->offset); in vc4_full_res_bounds_check() 413 if (surf->flags != 0 || surf->bits != 0) { in vc4_rcl_msaa_surface_setup() 418 if (surf->hindex == ~0) in vc4_rcl_msaa_surface_setup() 427 if (surf->offset & 0xf) { in vc4_rcl_msaa_surface_setup() 454 if (surf->hindex == ~0) in vc4_rcl_surface_setup() 470 if (surf->bits != 0) { in vc4_rcl_surface_setup() 487 surf->bits); in vc4_rcl_surface_setup() 520 if (surf->offset & 0xf) { in vc4_rcl_surface_setup() 545 if (surf->flags != 0) { in vc4_rcl_render_config_surface_setup() 555 surf->bits); in vc4_rcl_render_config_surface_setup() [all …]
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| /drivers/gpu/drm/vmwgfx/ |
| A D | vmwgfx_vkms.c | 49 struct vmw_surface *surf) in vmw_surface_sync() argument 55 vmw_resource_clean(&surf->res); in vmw_surface_sync() 80 struct vmw_surface *surf, in compute_crc() argument 86 vmw_surface_get_desc(surf->metadata.format); in compute_crc() 116 struct vmw_surface *surf = 0; in crc_generate_worker() local 133 if (surf) { in crc_generate_worker() 134 if (vmw_surface_sync(vmw, surf)) { in crc_generate_worker() 141 compute_crc(crtc, surf, &crc32); in crc_generate_worker() 142 vmw_surface_unreference(&surf); in crc_generate_worker() 496 struct vmw_surface *surf) in vmw_vkms_set_crc_surface() argument [all …]
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| A D | vmwgfx_kms.c | 60 struct vmw_surface *surf = vmw_user_object_surface(&vps->uo); in vmw_du_plane_unpin_surf() local 62 if (surf) { in vmw_du_plane_unpin_surf() 64 vmw_resource_unpin(&surf->res); in vmw_du_plane_unpin_surf() 423 struct vmw_surface *surf = vmw_user_object_surface(&vfbs->uo); in vmw_framebuffer_surface_destroy() local 433 if (!bo->dirty && surf && surf->res.dirty) in vmw_framebuffer_surface_destroy() 434 surf->res.func->dirty_free(&surf->res); in vmw_framebuffer_surface_destroy() 1777 struct vmw_surface *surf = vmw_user_object_surface(&vfbs->uo); in vmw_du_helper_plane_update() local 1779 ret = vmw_validation_add_resource(&val_ctx, &surf->res, in vmw_du_helper_plane_update()
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| A D | vmwgfx_vkms.h | 73 struct vmw_surface *surf);
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| A D | vmwgfx_cursor_plane.c | 486 struct vmw_surface *surf; in vmw_cursor_buffer_changed() local 500 surf = vmw_user_object_surface(&new_vps->uo); in vmw_cursor_buffer_changed() 501 if (surf) in vmw_cursor_buffer_changed() 502 vmw_bo_dirty_transfer_to_res(&surf->res); in vmw_cursor_buffer_changed()
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| A D | vmwgfx_bo.c | 867 struct vmw_surface *surf = NULL; in vmw_bo_surface() local 889 surf = vmw_res_to_srf(res); in vmw_bo_surface() 890 return surf; in vmw_bo_surface()
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| A D | vmwgfx_surface.c | 877 struct vmw_surface *surf; in vmw_lookup_user_surface_for_buffer() local 880 surf = vmw_bo_surface(bo); in vmw_lookup_user_surface_for_buffer() 881 if (surf) { in vmw_lookup_user_surface_for_buffer() 883 user_srf = container_of(surf, struct vmw_user_surface, srf); in vmw_lookup_user_surface_for_buffer() 904 struct vmw_surface *surf = NULL; in vmw_lookup_surface_for_buffer() local 908 surf = vmw_surface_reference(&user_srf->srf); in vmw_lookup_surface_for_buffer() 912 return surf; in vmw_lookup_surface_for_buffer()
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| A D | vmwgfx_scrn.c | 586 struct vmw_surface *surf = NULL; in vmw_sou_surface_pre_clip() local 594 surf = vmw_user_object_surface(&vfbs->uo); in vmw_sou_surface_pre_clip() 595 blit->body.srcImage.sid = surf->res.id; in vmw_sou_surface_pre_clip()
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| /drivers/gpu/drm/gma500/ |
| A D | oaktrail_device.c | 155 p->surf = PSB_RVDC32(DSPASURF); in oaktrail_save_display_registers() 288 PSB_WVDC32(p->surf, DSPASURF); in oaktrail_restore_display_registers() 412 .surf = DSPASURF, 436 .surf = DSPBSURF,
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| A D | psb_device.c | 215 .surf = DSPASURF, 239 .surf = DSPBSURF,
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| A D | cdv_device.c | 515 .surf = DSPASURF, 540 .surf = DSPBSURF,
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| A D | psb_drv.h | 238 u32 surf; member 273 u32 surf; member
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| A D | oaktrail_crtc.c | 646 REG_WRITE(map->surf, start); in oaktrail_pipe_set_base() 647 REG_READ(map->surf); in oaktrail_pipe_set_base()
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| A D | oaktrail_hdmi.c | 776 pipeb->surf = PSB_RVDC32(DSPBSURF); in oaktrail_hdmi_save() 832 PSB_WVDC32(pipeb->surf, DSPBSURF); in oaktrail_hdmi_restore()
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| A D | gma_display.c | 129 REG_WRITE(map->surf, start); in gma_pipe_set_base() 130 REG_READ(map->surf); in gma_pipe_set_base()
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| /drivers/gpu/drm/i915/display/ |
| A D | i9xx_plane.c | 572 error->surf = intel_de_read(display, DSPSURF(display, i9xx_plane)); in g4x_primary_capture_error() 584 error->surf = intel_de_read(display, DSPSURF(display, i9xx_plane)); in i965_plane_capture_error() 595 error->surf = intel_de_read(display, DSPADDR(display, i9xx_plane)); in i8xx_plane_capture_error()
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