| /drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| A D | dml2_core_utils.c | 430 if (sw_mode == dml2_sw_linear) in dml2_core_utils_get_tile_block_size_bytes()
432 else if (sw_mode == dml2_sw_256b_2d) in dml2_core_utils_get_tile_block_size_bytes()
434 else if (sw_mode == dml2_sw_4kb_2d) in dml2_core_utils_get_tile_block_size_bytes()
436 else if (sw_mode == dml2_sw_64kb_2d) in dml2_core_utils_get_tile_block_size_bytes()
467 return sw_mode == dml2_sw_linear; in dml2_core_utils_is_linear()
486 if (sw_mode == dml2_sw_linear || in dml2_core_utils_get_gfx_version()
487 sw_mode == dml2_sw_256b_2d || in dml2_core_utils_get_gfx_version()
488 sw_mode == dml2_sw_4kb_2d || in dml2_core_utils_get_gfx_version()
489 sw_mode == dml2_sw_64kb_2d || in dml2_core_utils_get_gfx_version()
490 sw_mode == dml2_sw_256kb_2d) in dml2_core_utils_get_gfx_version()
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| A D | dml2_core_utils.h | 23 unsigned int dml2_core_utils_get_tile_block_size_bytes(enum dml2_swizzle_mode sw_mode, unsigned int…
24 bool dml2_core_utils_get_segment_horizontal_contiguous(enum dml2_swizzle_mode sw_mode, unsigned int…
26 bool dml2_core_utils_is_linear(enum dml2_swizzle_mode sw_mode);
27 int unsigned dml2_core_utils_get_gfx_version(enum dml2_swizzle_mode sw_mode);
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| A D | dml2_core_dcn4_calcs.c | 507 if (sw_mode == dml2_sw_linear) in dml_get_tile_block_size_bytes()
509 else if (sw_mode == dml2_sw_256b_2d) in dml_get_tile_block_size_bytes()
511 else if (sw_mode == dml2_sw_4kb_2d) in dml_get_tile_block_size_bytes()
513 else if (sw_mode == dml2_sw_64kb_2d) in dml_get_tile_block_size_bytes()
515 else if (sw_mode == dml2_sw_256kb_2d) in dml_get_tile_block_size_bytes()
552 if (sw_mode == dml2_sw_linear || in dml_get_gfx_version()
553 sw_mode == dml2_sw_256b_2d || in dml_get_gfx_version()
554 sw_mode == dml2_sw_4kb_2d || in dml_get_gfx_version()
555 sw_mode == dml2_sw_64kb_2d || in dml_get_gfx_version()
556 sw_mode == dml2_sw_256kb_2d) { in dml_get_gfx_version()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| A D | dcn20_fpu.c | 1255 unsigned int *sw_mode) in swizzle_to_dml_params() argument
1259 *sw_mode = dm_sw_linear; in swizzle_to_dml_params()
1262 *sw_mode = dm_sw_4kb_s; in swizzle_to_dml_params()
1265 *sw_mode = dm_sw_4kb_s_x; in swizzle_to_dml_params()
1268 *sw_mode = dm_sw_4kb_d; in swizzle_to_dml_params()
1271 *sw_mode = dm_sw_4kb_d_x; in swizzle_to_dml_params()
1274 *sw_mode = dm_sw_64kb_s; in swizzle_to_dml_params()
1283 *sw_mode = dm_sw_64kb_d; in swizzle_to_dml_params()
1295 *sw_mode = dm_sw_var_s; in swizzle_to_dml_params()
1298 *sw_mode = dm_sw_var_s_x; in swizzle_to_dml_params()
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| A D | display_rq_dlg_calc_20.c | 245 bool surf_linear = (pipe_src_param->sw_mode == dm_sw_linear); in handle_det_buf_split()
724 pipe_src_param->sw_mode, in get_surf_rq_param()
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| A D | display_rq_dlg_calc_20v2.c | 245 bool surf_linear = (pipe_src_param->sw_mode == dm_sw_linear); in handle_det_buf_split()
724 pipe_src_param->sw_mode, in get_surf_rq_param()
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| /drivers/spi/ |
| A D | spi-dw-mmio.c | 85 u32 sw_mode = MSCC_SPI_MST_SW_MODE_SW_PIN_CTRL_MODE; in dw_spi_mscc_set_cs() local
88 sw_mode |= MSCC_SPI_MST_SW_MODE_SW_SPI_CS(BIT(cs)); in dw_spi_mscc_set_cs()
90 writel(sw_mode, dwsmscc->spi_mst + MSCC_SPI_MST_SW_MODE); in dw_spi_mscc_set_cs()
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| /drivers/gpu/drm/amd/amdgpu/ |
| A D | uvd_v4_2.c | 50 bool sw_mode);
636 bool sw_mode) in uvd_v4_2_set_dcm() argument
648 if (sw_mode) { in uvd_v4_2_set_dcm()
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| A D | uvd_v3_1.c | 207 bool sw_mode) in uvd_v3_1_set_dcm() argument
219 if (sw_mode) { in uvd_v3_1_set_dcm()
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| /drivers/gpu/drm/amd/display/dc/dml2/ |
| A D | dml_display_rq_dlg_calc.c | 45 …enum dml_swizzle_mode sw_mode = mode_lib->ms.cache_display_cfg.surface.SurfaceTiling[plane_idx… in dml_rq_dlg_get_rq_reg() local
132 if (sw_mode == dml_sw_linear) in dml_rq_dlg_get_rq_reg()
139 if (sw_mode == dml_sw_linear) in dml_rq_dlg_get_rq_reg()
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| /drivers/gpu/drm/amd/display/dc/dml/ |
| A D | dml1_display_rq_dlg_calc.c | 284 bool surf_linear = (pipe_src_param->sw_mode == dm_sw_linear); in handle_det_buf_split()
647 surf_linear = (pipe_src_param->sw_mode == dm_sw_linear); in get_surf_rq_param()
684 if (pipe_src_param->sw_mode != dm_sw_linear) in get_surf_rq_param()
933 pipe_src_param->sw_mode, in get_surf_rq_param()
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| A D | display_mode_lib.c | 193 dml_print("DML PARAMS: sw_mode = %d\n", pipe_src->sw_mode); in dml_log_pipe_params()
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| A D | display_mode_structs.h | 401 int sw_mode; member
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_hw_sequencer_debug.c | 152 s->sw_mode, in dcn10_get_hubp_states()
172 s->sw_mode, in dcn10_get_hubp_states()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| A D | display_rq_dlg_calc_32.c | 134 if (src->sw_mode == dm_sw_linear) in dml32_rq_dlg_get_rq_reg()
143 if (src->sw_mode == dm_sw_linear) in dml32_rq_dlg_get_rq_reg()
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| /drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| A D | dcn_calcs.c | 162 static enum dcn_bw_defs tl_sw_mode_to_bw_defs(enum swizzle_mode_values sw_mode) in tl_sw_mode_to_bw_defs() argument
164 switch (sw_mode) { in tl_sw_mode_to_bw_defs()
254 enum source_macro_tile_size swizzle_mode_to_macro_tile_size(enum swizzle_mode_values sw_mode) in swizzle_mode_to_macro_tile_size() argument
256 switch (sw_mode) { in swizzle_mode_to_macro_tile_size()
339 input->src.sw_mode = pipe->plane_state->tiling_info.gfx9.swizzle; in pipe_ctx_to_e2e_pipe_params()
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| /drivers/gpu/drm/amd/display/dc/inc/ |
| A D | dcn_calcs.h | 646 enum source_macro_tile_size swizzle_mode_to_macro_tile_size(enum swizzle_mode_values sw_mode);
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| /drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| A D | display_rq_dlg_calc_21.c | 227 bool surf_linear = (pipe_src_param->sw_mode == dm_sw_linear); in handle_det_buf_split()
764 pipe_param->src.sw_mode, in get_surf_rq_param()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| A D | display_rq_dlg_calc_30.c | 169 bool surf_linear = (pipe_src_param->sw_mode == dm_sw_linear); in handle_det_buf_split()
736 pipe_param->src.sw_mode, in get_surf_rq_param()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| A D | display_rq_dlg_calc_31.c | 176 bool surf_linear = (pipe_src_param->sw_mode == dm_sw_linear); in handle_det_buf_split()
734 pipe_param->src.sw_mode, in get_surf_rq_param()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| A D | display_rq_dlg_calc_314.c | 264 bool surf_linear = (pipe_src_param->sw_mode == dm_sw_linear); in handle_det_buf_split()
821 pipe_param->src.sw_mode, in get_surf_rq_param()
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| /drivers/tty/serial/ |
| A D | msm_serial.c | 637 goto sw_mode; in msm_start_rx_dma()
689 sw_mode: in msm_start_rx_dma()
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| /drivers/gpu/drm/amd/display/dc/hubp/dcn401/ |
| A D | dcn401_hubp.c | 945 SW_MODE, &s->sw_mode); in hubp401_read_state()
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| /drivers/gpu/drm/amd/display/dc/hubp/dcn10/ |
| A D | dcn10_hubp.h | 699 uint32_t sw_mode; member
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| A D | dcn10_hubp.c | 1059 SW_MODE, &s->sw_mode); in hubp1_read_state_common()
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