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Searched refs:symclk_state (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/display/dc/
A Ddc_hw_types.h1145 enum symclk_state { enum
1156 enum symclk_state symclk_state; member
/drivers/gpu/drm/amd/display/dc/hwss/dcn314/
A Ddcn314_hwseq.c496 link->phy_state.symclk_state = SYMCLK_ON_TX_OFF; in apply_symclk_on_tx_off_wa()
519 link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; in dcn314_disable_link_output()
/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
A Ddcn401_hwseq.c209 link->phy_state.symclk_state = SYMCLK_ON_TX_ON; in dcn401_init_hw()
730 if (stream->link->phy_state.symclk_state == SYMCLK_OFF_TX_OFF) in enable_stream_timing_calc()
731 stream->link->phy_state.symclk_state = SYMCLK_ON_TX_OFF; in enable_stream_timing_calc()
733 stream->link->phy_state.symclk_state = SYMCLK_ON_TX_ON; in enable_stream_timing_calc()
1043 link->phy_state.symclk_state = SYMCLK_ON_TX_OFF; in dcn401_disable_link_output()
1046 link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; in dcn401_disable_link_output()
1849 if (link->phy_state.symclk_state == SYMCLK_ON_TX_OFF) { in dcn401_reset_back_end_for_pipe()
1852 link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; in dcn401_reset_back_end_for_pipe()
/drivers/gpu/drm/amd/display/dc/hwss/dce110/
A Ddce110_hwseq.c1554 if (stream->link->phy_state.symclk_state == SYMCLK_OFF_TX_OFF) in dce110_enable_stream_timing()
1555 stream->link->phy_state.symclk_state = SYMCLK_ON_TX_OFF; in dce110_enable_stream_timing()
1557 stream->link->phy_state.symclk_state = SYMCLK_ON_TX_ON; in dce110_enable_stream_timing()
3244 link->phy_state.symclk_state = SYMCLK_ON_TX_ON; in dce110_enable_lvds_link_output()
3260 link->phy_state.symclk_state = SYMCLK_ON_TX_ON; in dce110_enable_tmds_link_output()
3322 link->phy_state.symclk_state = SYMCLK_ON_TX_ON; in dce110_enable_dp_link_output()
3346 link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; in dce110_disable_link_output()
/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
A Ddcn32_hwseq.c845 link->phy_state.symclk_state = SYMCLK_ON_TX_ON; in dcn32_init_hw()
1385 link->phy_state.symclk_state = SYMCLK_ON_TX_OFF; in apply_symclk_on_tx_off_wa()
1408 link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; in dcn32_disable_link_output()
/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
A Ddcn20_hwseq.c905 if (stream->link->phy_state.symclk_state == SYMCLK_OFF_TX_OFF) in dcn20_enable_stream_timing()
906 stream->link->phy_state.symclk_state = SYMCLK_ON_TX_OFF; in dcn20_enable_stream_timing()
908 stream->link->phy_state.symclk_state = SYMCLK_ON_TX_ON; in dcn20_enable_stream_timing()
2867 if (link->phy_state.symclk_state == SYMCLK_ON_TX_OFF) { in dcn20_reset_back_end_for_pipe()
2870 link->phy_state.symclk_state = SYMCLK_OFF_TX_OFF; in dcn20_reset_back_end_for_pipe()
/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
A Ddcn10_hwseq.c1177 if (stream->link->phy_state.symclk_state == SYMCLK_OFF_TX_OFF) in dcn10_enable_stream_timing()
1178 stream->link->phy_state.symclk_state = SYMCLK_ON_TX_OFF; in dcn10_enable_stream_timing()
1180 stream->link->phy_state.symclk_state = SYMCLK_ON_TX_ON; in dcn10_enable_stream_timing()

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