| /drivers/gpu/drm/amd/display/dc/dce110/ |
| A D | dce110_opp_csc_v.c | 132 tbl_entry->regval[0], in program_color_matrix_v()
138 tbl_entry->regval[1], in program_color_matrix_v()
150 tbl_entry->regval[2], in program_color_matrix_v()
156 tbl_entry->regval[3], in program_color_matrix_v()
168 tbl_entry->regval[4], in program_color_matrix_v()
174 tbl_entry->regval[5], in program_color_matrix_v()
186 tbl_entry->regval[6], in program_color_matrix_v()
192 tbl_entry->regval[7], in program_color_matrix_v()
204 tbl_entry->regval[8], in program_color_matrix_v()
210 tbl_entry->regval[9], in program_color_matrix_v()
[all …]
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| A D | dce110_transform_v.h | 43 const struct out_csc_color_matrix *tbl_entry);
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_transform.c | 1240 OUTPUT_CSC_C11, tbl_entry->regval[0], in program_color_matrix()
1241 OUTPUT_CSC_C12, tbl_entry->regval[1]); in program_color_matrix()
1245 OUTPUT_CSC_C11, tbl_entry->regval[2], in program_color_matrix()
1246 OUTPUT_CSC_C12, tbl_entry->regval[3]); in program_color_matrix()
1250 OUTPUT_CSC_C11, tbl_entry->regval[4], in program_color_matrix()
1251 OUTPUT_CSC_C12, tbl_entry->regval[5]); in program_color_matrix()
1255 OUTPUT_CSC_C11, tbl_entry->regval[6], in program_color_matrix()
1256 OUTPUT_CSC_C12, tbl_entry->regval[7]); in program_color_matrix()
1260 OUTPUT_CSC_C11, tbl_entry->regval[8], in program_color_matrix()
1261 OUTPUT_CSC_C12, tbl_entry->regval[9]); in program_color_matrix()
[all …]
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| A D | dce_transform.h | 677 const struct out_csc_color_matrix *tbl_entry);
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| /drivers/gpu/drm/amd/display/dc/hwss/dce60/ |
| A D | dce60_hwseq.c | 276 struct out_csc_color_matrix tbl_entry; in dce60_program_front_end_for_pipe() local
281 memset(&tbl_entry, 0, sizeof(tbl_entry)); in dce60_program_front_end_for_pipe()
291 tbl_entry.color_space = in dce60_program_front_end_for_pipe()
295 tbl_entry.regval[i] = in dce60_program_front_end_for_pipe()
299 (pipe_ctx->plane_res.xfm, &tbl_entry); in dce60_program_front_end_for_pipe()
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| /drivers/gpu/drm/amd/display/dc/dpp/dcn401/ |
| A D | dcn401_dpp_cm.c | 159 const struct dpp_input_csc_matrix *tbl_entry) in dpp401_program_cursor_csc() argument
174 if (tbl_entry == NULL) { in dpp401_program_cursor_csc()
188 regval = tbl_entry->regval; in dpp401_program_cursor_csc()
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| A D | dcn401_dpp.c | 72 struct out_csc_color_matrix tbl_entry; in dpp401_dpp_setup() local
205 tbl_entry.regval[i] = input_csc_color_matrix.matrix[i]; in dpp401_dpp_setup()
207 tbl_entry.color_space = input_color_space; in dpp401_dpp_setup()
215 &tbl_entry); in dpp401_dpp_setup()
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| /drivers/gpu/drm/amd/display/dc/dpp/dcn20/ |
| A D | dcn20_dpp.c | 111 struct out_csc_color_matrix tbl_entry; in dpp2_cnv_setup() local
235 tbl_entry.regval[i] = input_csc_color_matrix.matrix[i]; in dpp2_cnv_setup()
237 tbl_entry.color_space = input_color_space; in dpp2_cnv_setup()
244 dpp2_program_input_csc(dpp_base, color_space, select, &tbl_entry); in dpp2_cnv_setup()
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| A D | dcn20_dpp_cm.c | 296 const struct out_csc_color_matrix *tbl_entry) in dpp2_program_input_csc() argument
311 if (tbl_entry == NULL) { in dpp2_program_input_csc()
323 regval = tbl_entry->regval; in dpp2_program_input_csc()
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| A D | dcn20_dpp.h | 728 const struct out_csc_color_matrix *tbl_entry);
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| /drivers/gpu/drm/amd/display/dc/dpp/dcn10/ |
| A D | dcn10_dpp.c | 293 struct out_csc_color_matrix tbl_entry; in dpp1_cnv_setup() local
392 tbl_entry.regval[i] = input_csc_color_matrix.matrix[i]; in dpp1_cnv_setup()
394 tbl_entry.color_space = color_space; in dpp1_cnv_setup()
401 dpp1_program_input_csc(dpp_base, color_space, select, &tbl_entry); in dpp1_cnv_setup()
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| A D | dcn10_dpp_cm.c | 493 const struct out_csc_color_matrix *tbl_entry) in dpp1_program_input_csc() argument
508 if (tbl_entry == NULL) { in dpp1_program_input_csc()
520 regval = tbl_entry->regval; in dpp1_program_input_csc()
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| A D | dcn10_dpp.h | 1434 const struct out_csc_color_matrix *tbl_entry);
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| /drivers/iommu/intel/ |
| A D | debugfs.c | 184 static void pasid_tbl_walk(struct seq_file *m, struct pasid_entry *tbl_entry, in pasid_tbl_walk() argument
191 if (pasid_pte_is_present(tbl_entry)) { in pasid_tbl_walk()
192 tbl_wlk->pasid_tbl_entry = tbl_entry; in pasid_tbl_walk()
197 tbl_entry++; in pasid_tbl_walk()
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| /drivers/gpu/drm/amd/display/dc/dpp/dcn30/ |
| A D | dcn30_dpp.c | 92 const struct out_csc_color_matrix *tbl_entry) in dpp3_program_post_csc() argument
107 if (tbl_entry == NULL) { in dpp3_program_post_csc()
119 regval = tbl_entry->regval; in dpp3_program_post_csc()
222 struct out_csc_color_matrix tbl_entry; in dpp3_cnv_setup() local
359 tbl_entry.regval[i] = input_csc_color_matrix.matrix[i]; in dpp3_cnv_setup()
361 tbl_entry.color_space = input_color_space; in dpp3_cnv_setup()
369 &tbl_entry); in dpp3_cnv_setup()
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| A D | dcn30_dpp.h | 633 const struct out_csc_color_matrix *tbl_entry);
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| /drivers/gpu/drm/amd/display/dc/inc/hw/ |
| A D | transform.h | 195 const struct out_csc_color_matrix *tbl_entry);
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| /drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| A D | dce110_hwseq.c | 2915 struct out_csc_color_matrix tbl_entry; in dce110_program_front_end_for_pipe() local
2919 memset(&tbl_entry, 0, sizeof(tbl_entry)); in dce110_program_front_end_for_pipe()
2929 tbl_entry.color_space = in dce110_program_front_end_for_pipe()
2933 tbl_entry.regval[i] = in dce110_program_front_end_for_pipe()
2937 (pipe_ctx->plane_res.xfm, &tbl_entry); in dce110_program_front_end_for_pipe()
3097 struct out_csc_color_matrix tbl_entry; in program_output_csc() local
3103 tbl_entry.regval[i] = pipe_ctx->stream->csc_color_matrix.matrix[i]; in program_output_csc()
3105 tbl_entry.color_space = color_space; in program_output_csc()
3108 pipe_ctx->plane_res.xfm, &tbl_entry); in program_output_csc()
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