Searched refs:tc_offset (Results 1 – 8 of 8) sorted by relevance
| /drivers/net/ethernet/hisilicon/hns3/hns3_common/ |
| A D | hclge_comm_rss.h | 122 void hclge_comm_get_rss_tc_info(u16 rss_size, u8 hw_tc_map, u16 *tc_offset,
124 int hclge_comm_set_rss_tc_mode(struct hclge_comm_hw *hw, u16 *tc_offset,
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| A D | hclge_comm_rss.c | 67 void hclge_comm_get_rss_tc_info(u16 rss_size, u8 hw_tc_map, u16 *tc_offset, in hclge_comm_get_rss_tc_info() argument
79 tc_offset[i] = (hw_tc_map & BIT(i)) ? rss_size * i : 0; in hclge_comm_get_rss_tc_info()
84 int hclge_comm_set_rss_tc_mode(struct hclge_comm_hw *hw, u16 *tc_offset, in hclge_comm_set_rss_tc_mode() argument
106 HCLGE_COMM_RSS_TC_OFFSET_S, tc_offset[i]); in hclge_comm_set_rss_tc_mode()
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| /drivers/media/platform/allegro-dvt/ |
| A D | allegro-mail.h | 80 s8 tc_offset; member
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| A D | allegro-mail.c | 146 FIELD_PREP(GENMASK(7, 0), param->tc_offset); in allegro_encode_config_blob()
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| A D | allegro-core.c | 1252 param->tc_offset = TC_OFFSET_DIV_2; in fill_create_channel_param()
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| /drivers/net/ethernet/realtek/ |
| A D | r8169_main.c | 734 struct rtl8169_tc_offsets tc_offset; member
1871 if (tp->tc_offset.inited) in rtl8169_init_counter_offsets()
1878 tp->tc_offset.tx_errors = counters->tx_errors; in rtl8169_init_counter_offsets()
1879 tp->tc_offset.tx_multi_collision = counters->tx_multi_collision; in rtl8169_init_counter_offsets()
1880 tp->tc_offset.tx_aborted = counters->tx_aborted; in rtl8169_init_counter_offsets()
1881 tp->tc_offset.rx_missed = counters->rx_missed; in rtl8169_init_counter_offsets()
1884 tp->tc_offset.inited = true; in rtl8169_init_counter_offsets()
4943 le64_to_cpu(tp->tc_offset.tx_errors); in rtl8169_get_stats64()
4945 le32_to_cpu(tp->tc_offset.tx_multi_collision); in rtl8169_get_stats64()
4947 le16_to_cpu(tp->tc_offset.tx_aborted); in rtl8169_get_stats64()
[all …]
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| /drivers/net/ethernet/hisilicon/hns3/hns3vf/ |
| A D | hclgevf_main.c | 2190 u16 tc_offset[HCLGE_COMM_MAX_TC_NUM]; in hclgevf_rss_init_hw() local
2213 tc_offset, tc_valid, tc_size); in hclgevf_rss_init_hw()
2215 return hclge_comm_set_rss_tc_mode(&hdev->hw.hw, tc_offset, in hclgevf_rss_init_hw()
3160 u16 tc_offset[HCLGE_COMM_MAX_TC_NUM]; in hclgevf_set_channels() local
3172 tc_offset, tc_valid, tc_size); in hclgevf_set_channels()
3173 ret = hclge_comm_set_rss_tc_mode(&hdev->hw.hw, tc_offset, in hclgevf_set_channels()
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| /drivers/net/ethernet/hisilicon/hns3/hns3pf/ |
| A D | hclge_main.c | 4923 u16 tc_offset[HCLGE_MAX_TC_NUM] = {0}; in hclge_init_rss_tc_mode() local
4956 tc_offset[i] = tc_info->tqp_offset[i]; in hclge_init_rss_tc_mode()
4959 return hclge_comm_set_rss_tc_mode(&hdev->hw.hw, tc_offset, tc_valid, in hclge_init_rss_tc_mode()
12383 u16 tc_offset[HCLGE_MAX_TC_NUM] = {0}; in hclge_set_rss_tc_mode_cfg() local
12401 tc_offset[i] = vport->nic.kinfo.rss_size * i; in hclge_set_rss_tc_mode_cfg()
12404 return hclge_comm_set_rss_tc_mode(&hdev->hw.hw, tc_offset, tc_valid, in hclge_set_rss_tc_mode_cfg()
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