Home
last modified time | relevance | path

Searched refs:test_ctl_hi1_val (Results 1 – 25 of 35) sorted by relevance

12

/drivers/clk/qcom/
A Dcamcc-sm8550.c68 .test_ctl_hi1_val = 0x00009000,
146 .test_ctl_hi1_val = 0x00009000,
229 .test_ctl_hi1_val = 0x00009000,
284 .test_ctl_hi1_val = 0x00009000,
339 .test_ctl_hi1_val = 0x00009000,
394 .test_ctl_hi1_val = 0x00009000,
449 .test_ctl_hi1_val = 0x00009000,
504 .test_ctl_hi1_val = 0x00009000,
559 .test_ctl_hi1_val = 0x00009000,
614 .test_ctl_hi1_val = 0x00009000,
[all …]
A Dgpucc-sc8280xp.c53 .test_ctl_hi1_val = 0x01800000,
82 .test_ctl_hi1_val = 0x01800000,
A Dvideocc-sm8450.c57 .test_ctl_hi1_val = 0x00009000,
101 .test_ctl_hi1_val = 0x00009000,
A Dgpucc-sar2130p.c51 .test_ctl_hi1_val = 0x00009000,
83 .test_ctl_hi1_val = 0x00009000,
A Dgpucc-sm6115.c60 .test_ctl_hi1_val = 0x1,
116 .test_ctl_hi1_val = 0x1,
A Dgpucc-x1p42100.c54 .test_ctl_hi1_val = 0x00009000,
86 .test_ctl_hi1_val = 0x00009000,
A Dcamcc-sm8650.c66 .test_ctl_hi1_val = 0x00009000,
144 .test_ctl_hi1_val = 0x00009000,
227 .test_ctl_hi1_val = 0x00009000,
282 .test_ctl_hi1_val = 0x00009000,
337 .test_ctl_hi1_val = 0x00009000,
392 .test_ctl_hi1_val = 0x00009000,
447 .test_ctl_hi1_val = 0x00009000,
502 .test_ctl_hi1_val = 0x00009000,
557 .test_ctl_hi1_val = 0x00009000,
635 .test_ctl_hi1_val = 0x00009000,
A Dgpucc-sm8350.c49 .test_ctl_hi1_val = 0x01800000,
82 .test_ctl_hi1_val = 0x01800000,
A Dgpucc-sm8550.c49 .test_ctl_hi1_val = 0x00009000,
80 .test_ctl_hi1_val = 0x00009000,
A Dvideocc-sm8350.c56 .test_ctl_hi1_val = 0x01800000,
87 .test_ctl_hi1_val = 0x01800000,
A Dcamcc-milos.c68 .test_ctl_hi1_val = 0x00009000,
147 .test_ctl_hi1_val = 0x00009000,
232 .test_ctl_hi1_val = 0x00009000,
288 .test_ctl_hi1_val = 0x00009000,
344 .test_ctl_hi1_val = 0x00009000,
400 .test_ctl_hi1_val = 0x00009000,
A Dgpucc-sm8650.c52 .test_ctl_hi1_val = 0x00009000,
83 .test_ctl_hi1_val = 0x00009000,
A Dvideocc-sm8550.c45 .test_ctl_hi1_val = 0x00009000,
77 .test_ctl_hi1_val = 0x00009000,
A Dcamcc-sm8450.c81 .test_ctl_hi1_val = 0x00009000,
187 .test_ctl_hi1_val = 0x00009000,
294 .test_ctl_hi1_val = 0x00009000,
367 .test_ctl_hi1_val = 0x00009000,
440 .test_ctl_hi1_val = 0x00009000,
513 .test_ctl_hi1_val = 0x00009000,
586 .test_ctl_hi1_val = 0x00009000,
659 .test_ctl_hi1_val = 0x00009000,
A Dcamcc-sc8180x.c58 .test_ctl_hi1_val = 0x00000020,
133 .test_ctl_hi1_val = 0x00000020,
164 .test_ctl_hi1_val = 0x00000000,
214 .test_ctl_hi1_val = 0x00000020,
243 .test_ctl_hi1_val = 0x00000020,
272 .test_ctl_hi1_val = 0x00000020,
301 .test_ctl_hi1_val = 0x00000020,
A Dcamcc-x1e80100.c61 .test_ctl_hi1_val = 0x00009000,
139 .test_ctl_hi1_val = 0x00009000,
222 .test_ctl_hi1_val = 0x00009000,
277 .test_ctl_hi1_val = 0x00009000,
332 .test_ctl_hi1_val = 0x00009000,
387 .test_ctl_hi1_val = 0x00009000,
A Dvideocc-sm8150.c37 .test_ctl_hi1_val = 0x00000020,
A Dcamcc-sm8150.c58 .test_ctl_hi1_val = 0x00000020,
135 .test_ctl_hi1_val = 0x00000020,
189 .test_ctl_hi1_val = 0x00000000,
243 .test_ctl_hi1_val = 0x00000020,
297 .test_ctl_hi1_val = 0x00000020,
A Dcamcc-sc8280xp.c64 .test_ctl_hi1_val = 0x01800000,
139 .test_ctl_hi1_val = 0x01800000,
217 .test_ctl_hi1_val = 0x01800000,
270 .test_ctl_hi1_val = 0x01800000,
323 .test_ctl_hi1_val = 0x01800000,
376 .test_ctl_hi1_val = 0x01800000,
429 .test_ctl_hi1_val = 0x01800000,
A Dgpucc-sm8450.c61 .test_ctl_hi1_val = 0x00009000,
102 .test_ctl_hi1_val = 0x00009000,
A Dclk-alpha-pll.h143 u32 test_ctl_hi1_val; member
A Dclk-alpha-pll.c880 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val); in clk_huayra_2290_pll_configure()
1728 config->test_ctl_hi1_val); in clk_trion_pll_configure()
1950 config->test_ctl_hi1_val); in clk_lucid_5lpe_pll_configure()
2156 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val); in clk_zonda_pll_configure()
2336 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val); in clk_lucid_evo_pll_configure()
2364 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val); in clk_lucid_ole_pll_configure()
2694 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val); in clk_pongo_elu_pll_configure()
2955 clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val); in clk_regera_pll_configure()
A Dgpucc-sm8150.c42 .test_ctl_hi1_val = 0x00000020,
A Dvideocc-milos.c51 .test_ctl_hi1_val = 0x00009000,
A Dgpucc-milos.c55 .test_ctl_hi1_val = 0x00009000,

Completed in 50 milliseconds

12