Searched refs:tilcdc_write (Results 1 – 2 of 2) sorted by relevance
| /drivers/gpu/drm/tilcdc/ |
| A D | tilcdc_regs.h | 114 static inline void tilcdc_write(struct drm_device *dev, u32 reg, u32 data) in tilcdc_write() function
143 tilcdc_write(dev, reg, (tilcdc_read(dev, reg) & ~mask) | (val & mask)); in tilcdc_write_mask()
148 tilcdc_write(dev, reg, tilcdc_read(dev, reg) | mask); in tilcdc_set()
153 tilcdc_write(dev, reg, tilcdc_read(dev, reg) & ~mask); in tilcdc_clear()
170 tilcdc_write(dev, tilcdc_irqstatus_reg(dev), mask); in tilcdc_clear_irqstatus()
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| A D | tilcdc_crtc.c | 107 tilcdc_write(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, in tilcdc_crtc_load_palette()
109 tilcdc_write(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG, in tilcdc_crtc_load_palette()
152 tilcdc_write(dev, LCDC_INT_ENABLE_SET_REG, in tilcdc_crtc_enable_irqs()
170 tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, in tilcdc_crtc_disable_irqs()
312 tilcdc_write(dev, LCDC_DMA_CTRL_REG, reg); in tilcdc_crtc_set_mode()
341 tilcdc_write(dev, LCDC_RASTER_TIMING_2_REG, reg); in tilcdc_crtc_set_mode()
349 tilcdc_write(dev, LCDC_RASTER_TIMING_0_REG, reg); in tilcdc_crtc_set_mode()
399 tilcdc_write(dev, LCDC_RASTER_CTRL_REG, reg); in tilcdc_crtc_set_mode()
966 tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, in tilcdc_crtc_irq()
990 tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, in tilcdc_crtc_irq()
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