| /drivers/gpu/drm/nouveau/dispnv50/ |
| A D | tile.h | 48 static inline int nouveau_get_gobs_in_block(u32 tile_mode, u16 chipset) in nouveau_get_gobs_in_block() argument
51 return 1 << (tile_mode >> 4); in nouveau_get_gobs_in_block()
52 return 1 << tile_mode; in nouveau_get_gobs_in_block()
56 static inline bool nouveau_check_tile_mode(u32 tile_mode, u16 chipset) in nouveau_check_tile_mode() argument
59 return (tile_mode & 0xfffff0f); in nouveau_check_tile_mode()
60 return (tile_mode & 0xfffffff0); in nouveau_check_tile_mode()
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| A D | wndw.c | 283 uint32_t tile_mode; in nv50_wndw_atomic_check_acquire() local
289 nouveau_framebuffer_get_layout(fb, &tile_mode, &kind); in nv50_wndw_atomic_check_acquire()
305 asyw->image.blockh = tile_mode >> 4; in nv50_wndw_atomic_check_acquire()
307 asyw->image.blockh = tile_mode; in nv50_wndw_atomic_check_acquire()
658 u32 tile_mode; in nv50_wndw_get_scanout_buffer() local
686 nouveau_framebuffer_get_layout(fb, &tile_mode, &kind); in nv50_wndw_get_scanout_buffer()
694 nouveau_get_gobs_in_block(tile_mode, chipset); in nv50_wndw_get_scanout_buffer()
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| /drivers/gpu/drm/nouveau/ |
| A D | nouveau_display.c | 134 uint32_t *tile_mode, in nouveau_decode_mod() argument
138 BUG_ON(!tile_mode || !kind); in nouveau_decode_mod()
142 *tile_mode = 0; in nouveau_decode_mod()
159 *tile_mode <<= 4; in nouveau_decode_mod()
165 uint32_t *tile_mode, in nouveau_framebuffer_get_layout() argument
175 *tile_mode = nvbo->mode; in nouveau_framebuffer_get_layout()
193 uint32_t *tile_mode, in nouveau_validate_decode_mod() argument
227 uint32_t tile_mode) in nouveau_check_bl_size() argument
265 uint32_t tile_mode; in nouveau_framebuffer_new() local
288 &tile_mode, &kind)) { in nouveau_framebuffer_new()
[all …]
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| A D | nouveau_bo.h | 67 u32 domain, u32 tile_mode, u32 tile_flags, bool internal);
71 u32 tile_mode, u32 tile_flags, struct sg_table *sg,
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| A D | nouveau_gem.h | 18 uint32_t domain, uint32_t tile_mode,
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| A D | nouveau_display.h | 68 nouveau_framebuffer_get_layout(struct drm_framebuffer *fb, uint32_t *tile_mode,
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| A D | nouveau_gem.c | 233 uint32_t tile_mode, uint32_t tile_flags, in nouveau_gem_new() argument
252 nvbo = nouveau_bo_alloc(cli, &size, &align, domain, tile_mode, in nouveau_gem_new()
326 rep->tile_mode = nvbo->mode; in nouveau_gem_info()
353 req->info.domain, req->info.tile_mode, in nouveau_gem_ioctl_new()
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| A D | nouveau_bo.c | 212 u32 tile_mode, u32 tile_flags, bool internal) in nouveau_bo_alloc() argument
266 nvbo->mode = tile_mode; in nouveau_bo_alloc()
375 uint32_t domain, uint32_t tile_mode, uint32_t tile_flags, in nouveau_bo_new() argument
382 nvbo = nouveau_bo_alloc(cli, &size, &align, domain, tile_mode, in nouveau_bo_new()
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| /drivers/video/fbdev/via/ |
| A D | via-core.c | 152 u32 tile_mode; /* "tile mode" setting */ member
262 descr->tile_mode = 0; in viafb_dma_copy_out_sg()
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| /drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_debug.c | 119 update->plane_info->tiling_info.gfx8.tile_mode, in update_surface_trace()
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| /drivers/gpu/drm/amd/display/dc/ |
| A D | dc_hw_types.h | 400 enum tile_mode_values tile_mode; member
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| /drivers/gpu/drm/amd/display/dc/dce110/ |
| A D | dce110_mem_input_v.c | 185 set_reg_field_value(value, info->gfx8.tile_mode, in program_tiling()
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_mem_input.c | 456 GRPH_MICRO_TILE_MODE, info->gfx8.tile_mode, in program_tiling()
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| /drivers/gpu/drm/amd/display/amdgpu_dm/ |
| A D | amdgpu_dm_plane.c | 202 tiling_info->gfx8.tile_mode = in amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags()
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