| /drivers/gpu/drm/xe/ |
| A D | xe_vram.c | 171 u64 ccs_size = tile_size / 512; in get_flat_ccs_offset()
222 u64 *tile_size, u64 *tile_offset) in tile_vram_size() argument
239 *tile_size = xe_gt_sriov_vf_lmem(gt); in tile_vram_size()
240 *vram_size = *tile_size; in tile_vram_size()
256 *tile_size = (u64)REG_FIELD_GET(GENMASK(14, 8), reg) * SZ_1G; in tile_vram_size()
262 offset = get_flat_ccs_offset(gt, *tile_size); in tile_vram_size()
305 u64 tile_size; in xe_vram_probe() local
315 err = tile_vram_size(tile, &vram_size, &tile_size, &tile_offset); in xe_vram_probe()
334 tile->mem.vram.actual_physical_size = tile_size; in xe_vram_probe()
356 total_size += tile_size; in xe_vram_probe()
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| A D | xe_ttm_stolen_mgr.c | 90 u64 tile_size; in detect_bar2_dgfx() local
93 tile_size = tile->mem.vram.actual_physical_size; in detect_bar2_dgfx()
97 if (drm_WARN_ON(&xe->drm, tile_size < mgr->stolen_base)) in detect_bar2_dgfx()
105 stolen_size = tile_size - mgr->stolen_base; in detect_bar2_dgfx()
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| /drivers/gpu/drm/i915/display/ |
| A D | intel_fb.c | 974 unsigned int tile_size, in intel_adjust_tile_offset() argument
982 WARN_ON(old_offset & (tile_size - 1)); in intel_adjust_tile_offset()
983 WARN_ON(new_offset & (tile_size - 1)); in intel_adjust_tile_offset()
1028 tile_size = intel_tile_size(display); in intel_adjust_aligned_offset()
1039 tile_size, pitch_tiles, in intel_adjust_aligned_offset()
1093 tile_size = intel_tile_size(display); in intel_compute_aligned_offset()
1116 tile_size, pitch_tiles, in intel_compute_aligned_offset()
1384 tile_size); in calc_plane_aligned_offset()
1386 return offset / tile_size; in calc_plane_aligned_offset()
1600 gtt_offset * tile_size, 0); in calc_plane_remap_info()
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| /drivers/gpu/drm/ |
| A D | drm_displayid_internal.h | 110 u8 tile_size[4]; member
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| A D | drm_edid.c | 7503 w = tile->tile_size[0] | tile->tile_size[1] << 8; in drm_parse_tiled_block()
7504 h = tile->tile_size[2] | tile->tile_size[3] << 8; in drm_parse_tiled_block()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| A D | display_rq_dlg_calc_20.c | 155 static unsigned int get_blk_size_bytes(const enum source_macro_tile_size tile_size) in get_blk_size_bytes() argument
157 if (tile_size == dm_256k_tile) in get_blk_size_bytes()
159 else if (tile_size == dm_64k_tile) in get_blk_size_bytes()
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| A D | display_rq_dlg_calc_20v2.c | 155 static unsigned int get_blk_size_bytes(const enum source_macro_tile_size tile_size) in get_blk_size_bytes() argument
157 if (tile_size == dm_256k_tile) in get_blk_size_bytes()
159 else if (tile_size == dm_64k_tile) in get_blk_size_bytes()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| A D | display_rq_dlg_calc_21.c | 131 static unsigned int get_blk_size_bytes(const enum source_macro_tile_size tile_size) in get_blk_size_bytes() argument
133 if (tile_size == dm_256k_tile) in get_blk_size_bytes()
135 else if (tile_size == dm_64k_tile) in get_blk_size_bytes()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| A D | display_rq_dlg_calc_30.c | 79 static unsigned int get_blk_size_bytes(const enum source_macro_tile_size tile_size) in get_blk_size_bytes() argument
81 if (tile_size == dm_256k_tile) in get_blk_size_bytes()
83 else if (tile_size == dm_64k_tile) in get_blk_size_bytes()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| A D | display_rq_dlg_calc_31.c | 81 static unsigned int get_blk_size_bytes(const enum source_macro_tile_size tile_size) in get_blk_size_bytes() argument
83 if (tile_size == dm_256k_tile) in get_blk_size_bytes()
85 else if (tile_size == dm_64k_tile) in get_blk_size_bytes()
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| /drivers/gpu/drm/amd/display/dc/dml/ |
| A D | dml1_display_rq_dlg_calc.c | 196 static unsigned int get_blk_size_bytes(const enum source_macro_tile_size tile_size) in get_blk_size_bytes() argument
198 if (tile_size == dm_256k_tile) in get_blk_size_bytes()
200 else if (tile_size == dm_64k_tile) in get_blk_size_bytes()
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| /drivers/media/test-drivers/visl/ |
| A D | visl-trace-av1.h | 54 __entry->t.tile_size,
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| /drivers/media/platform/mediatek/vcodec/decoder/vdec/ |
| A D | vdec_av1_req_lat_if.c | 187 u32 tile_size[V4L2_AV1_MAX_TILE_COUNT]; member
1422 tile_group->tile_size[i] = ctrl_tge[i].tile_size; in vdec_av1_slice_setup_tile_group()
1679 tile_info_buf[tile_info_base + 0] = (tile_group->tile_size[tile_num] << 3); in vdec_av1_slice_setup_tile_buffer()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| A D | display_rq_dlg_calc_314.c | 169 static unsigned int get_blk_size_bytes(const enum source_macro_tile_size tile_size) in get_blk_size_bytes() argument
171 if (tile_size == dm_256k_tile) in get_blk_size_bytes()
173 else if (tile_size == dm_64k_tile) in get_blk_size_bytes()
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| /drivers/media/platform/nuvoton/ |
| A D | npcm-video.c | 93 unsigned int tile_size; member
545 info.tile_size = info.tile_perrow * info.tile_perline; in npcm_video_get_rect_list()
560 } while (tile_cnt < info.tile_size); in npcm_video_get_rect_list()
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| /drivers/media/platform/verisilicon/ |
| A D | rockchip_vpu981_hw_av1_dec.c | 611 end = start + group_entry[tile_id].tile_size; in rockchip_vpu981_av1_dec_set_tile_info()
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