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Searched refs:tmp1 (Results 1 – 25 of 51) sorted by relevance

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/drivers/cpufreq/
A Dgx-suspmod.c334 u8 tmp1, tmp2; in cpufreq_gx_verify() local
349 tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2); in cpufreq_gx_verify()
355 tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2); in cpufreq_gx_verify()
375 u8 tmp1, tmp2; in cpufreq_gx_target() local
383 tmp_freq = gx_validate_speed(target_freq, &tmp1, &tmp2); in cpufreq_gx_target()
386 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); in cpufreq_gx_target()
390 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); in cpufreq_gx_target()
A Ds5pv210-cpufreq.c199 unsigned long tmp, tmp1; in s5pv210_set_refresh() local
216 tmp1 = s5pv210_dram_conf[ch].refresh; in s5pv210_set_refresh()
218 tmp1 /= tmp; in s5pv210_set_refresh()
220 writel_relaxed(tmp1, reg); in s5pv210_set_refresh()
/drivers/md/
A Ddm-ebs-target.c250 unsigned short tmp1; in ebs_ctr() local
275 if (sscanf(argv[2], "%hu%c", &tmp1, &dummy) != 1 || in ebs_ctr()
276 !__ebs_check_bs(tmp1) || in ebs_ctr()
277 to_bytes(tmp1) > PAGE_SIZE) { in ebs_ctr()
281 ec->e_bs = tmp1; in ebs_ctr()
284 if (sscanf(argv[3], "%hu%c", &tmp1, &dummy) != 1 || !__ebs_check_bs(tmp1)) { in ebs_ctr()
288 ec->u_bs = tmp1; in ebs_ctr()
/drivers/video/fbdev/i810/
A Di810_accel.c438 u32 tmp1, tmp2; in i810fb_init_ringbuffer() local
448 tmp1 = par->iring.physical; in i810fb_init_ringbuffer()
449 i810_writel(IRING + 8, mmio, tmp2 | tmp1); in i810fb_init_ringbuffer()
451 tmp1 = i810_readl(IRING + 12, mmio); in i810fb_init_ringbuffer()
452 tmp1 &= ~RBUFFER_SIZE_MASK; in i810fb_init_ringbuffer()
454 i810_writel(IRING + 12, mmio, tmp1 | tmp2); in i810fb_init_ringbuffer()
A Di810_main.c233 u32 tmp1, tmp2; in i810_load_pll() local
236 tmp1 = par->regs.M | par->regs.N << 16; in i810_load_pll()
241 tmp1 = par->regs.P; in i810_load_pll()
464 u32 tmp1, tmp2; in i810_restore_pll() local
467 tmp1 = par->hw_state.dclk_2d; in i810_restore_pll()
469 tmp1 &= ~MN_MASK; in i810_restore_pll()
473 tmp1 = par->hw_state.dclk_1d; in i810_restore_pll()
475 tmp1 &= ~MN_MASK; in i810_restore_pll()
484 u32 tmp1, tmp2; in i810_restore_dac() local
487 tmp1 = par->hw_state.pixconf; in i810_restore_dac()
[all …]
/drivers/media/dvb-frontends/
A Dcxd2820r_core.c52 u8 tmp0, tmp1; in cxd2820r_gpio() local
61 tmp1 = 0x00; in cxd2820r_gpio()
71 tmp1 |= (1 << (3 + i)); in cxd2820r_gpio()
73 tmp1 |= (0 << (3 + i)); in cxd2820r_gpio()
77 tmp1 |= (1 << (0 + i)); in cxd2820r_gpio()
79 tmp1 |= (0 << (0 + i)); in cxd2820r_gpio()
81 dev_dbg(&client->dev, "gpio i=%d %02x %02x\n", i, tmp0, tmp1); in cxd2820r_gpio()
84 dev_dbg(&client->dev, "wr gpio=%02x %02x\n", tmp0, tmp1); in cxd2820r_gpio()
92 ret = regmap_update_bits(priv->regmap[0], 0x008e, 0x3f, tmp1); in cxd2820r_gpio()
A Dm88rs2000.c476 u8 tmp0, tmp1; in m88rs2000_read_ber() local
489 tmp1 = m88rs2000_readreg(state, 0xd9); in m88rs2000_read_ber()
490 m88rs2000_writereg(state, 0xd9, (tmp1 & ~7) | 4); in m88rs2000_read_ber()
/drivers/media/common/b2c2/
A Dflexcop-sram.c240 u8 tmp1, tmp2;
247 tmp1 = 0x4f;
250 sram_write(adapter, addr + 4, &tmp1, 1);
264 tmp1 = 0xf4;
267 sram_write(adapter, addr + 4, &tmp1, 1);
/drivers/net/ethernet/mellanox/mlx5/core/lag/
A Dlag.h134 for (int tmp = start_index, tmp1 = end_index; \
135 tmp = mlx5_get_pre_ldev_func(ldev, tmp, tmp1), \
136 i = tmp, tmp >= tmp1; tmp--)
/drivers/gpu/drm/amd/amdkfd/
A Dcwsr_trap_handler_gfx10.asm1410 function save_and_clear_ib_sts(tmp1, tmp2)
1415 s_getreg_b32 tmp1, hwreg(HW_REG_IB_STS)
1416 s_and_b32 tmp2, tmp1, SQ_WAVE_IB_STS_REPLAY_W64H_MASK
1419 s_and_b32 tmp2, tmp1, SQ_WAVE_IB_STS_RCNT_FIRST_REPLAY_MASK
1422 s_andn2_b32 tmp1, tmp1, (SQ_WAVE_IB_STS_REPLAY_W64H_MASK | SQ_WAVE_IB_STS_RCNT_FIRST_REPLAY_MASK)
1423 s_setreg_b32 hwreg(HW_REG_IB_STS), tmp1
1426 function restore_ib_sts(tmp1, tmp2)
1428 s_and_b32 tmp2, tmp1, SQ_WAVE_IB_STS_RCNT_FIRST_REPLAY_MASK
1430 s_and_b32 tmp1, tmp1, SQ_WAVE_IB_STS_REPLAY_W64H_MASK
1431 s_or_b32 tmp1, tmp1, tmp2
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/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/
A Darith.fuc56 push $r4 // tmp1
72 shr b32 $r4 16 // tmp1 = tmp0_hi
81 shr b32 $r4 16 // tmp1 = tmp0_hi
/drivers/rtc/
A Drtc-m48t86.c198 unsigned char tmp0, tmp1; in m48t86_verify_chip() local
201 tmp1 = m48t86_readb(&pdev->dev, offset1); in m48t86_verify_chip()
210 m48t86_writeb(&pdev->dev, tmp1, offset1); in m48t86_verify_chip()
/drivers/scsi/sym53c8xx_2/
A Dsym_fw.c350 u32 opcode, new, old, tmp1, tmp2; in sym_fw_bind_script() local
408 tmp1 = cur[1]; in sym_fw_bind_script()
410 if ((tmp1 ^ tmp2) & 3) { in sym_fw_bind_script()
/drivers/gpu/drm/amd/display/dc/dce120/
A Ddce120_timing_generator.c432 uint32_t tmp1 = 0; in dce120_timing_generator_program_blanking() local
466 tmp1 = timing->h_total - in dce120_timing_generator_program_blanking()
468 tmp2 = tmp1 + timing->h_addressable + in dce120_timing_generator_program_blanking()
473 CRTC_H_BLANK_END, tmp1, in dce120_timing_generator_program_blanking()
476 tmp1 = timing->v_total - (v_sync_start + timing->v_border_top); in dce120_timing_generator_program_blanking()
477 tmp2 = tmp1 + timing->v_addressable + timing->v_border_top + in dce120_timing_generator_program_blanking()
482 CRTC_V_BLANK_END, tmp1, in dce120_timing_generator_program_blanking()
/drivers/gpu/drm/
A Ddrm_modes.c714 int tmp1, tmp2; in drm_cvt_mode() local
722 tmp1 = HV_FACTOR * 1000000 - in drm_cvt_mode()
726 hperiod = tmp1 * 2 / (tmp2 * vfieldrate); in drm_cvt_mode()
728 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1; in drm_cvt_mode()
730 if (tmp1 < (vsync + CVT_MIN_V_PORCH)) in drm_cvt_mode()
733 vsyncandback_porch = tmp1; in drm_cvt_mode()
780 int tmp1, tmp2; in drm_cvt_mode() local
782 tmp1 = HV_FACTOR * 1000000 - in drm_cvt_mode()
785 hperiod = tmp1 / (tmp2 * vfieldrate); in drm_cvt_mode()
880 unsigned int tmp1, tmp2; in drm_gtf_mode_complex() local
[all …]
/drivers/net/wireless/broadcom/b43/
A Dphy_lp.c1725 tmp1 = prod_msb - 20; in lpphy_calc_rx_iq_comp()
1727 if (tmp1 >= 0) { in lpphy_calc_rx_iq_comp()
1729 (ipwr >> tmp1); in lpphy_calc_rx_iq_comp()
1732 (ipwr << -tmp1); in lpphy_calc_rx_iq_comp()
2417 tmp1 = crystal_freq / 1000; in lpphy_b2062_tune()
2425 tmp4 = 48 * tmp1; in lpphy_b2062_tune()
2442 tmp9 = ((2 * tmp3 * (tmp8 + 1)) + (3 * tmp1)) / (6 * tmp1); in lpphy_b2062_tune()
2486 u32 tmp1, tmp2, tmp3, tmp4, tmp5, tmp6; in lpphy_b2063_tune() local
2542 tmp1 = ((val3 * 62500) / freqref) << 4; in lpphy_b2063_tune()
2545 tmp1++; in lpphy_b2063_tune()
[all …]
/drivers/target/iscsi/
A Discsi_target_parameters.c868 char *tmp1 = NULL, *tmp2 = NULL; in iscsi_check_valuelist_for_support() local
877 tmp1 = strchr(proposer_values, ','); in iscsi_check_valuelist_for_support()
878 if (tmp1) in iscsi_check_valuelist_for_support()
879 *tmp1 = '\0'; in iscsi_check_valuelist_for_support()
883 if (tmp1) in iscsi_check_valuelist_for_support()
884 *tmp1 = ','; in iscsi_check_valuelist_for_support()
900 if (tmp1) in iscsi_check_valuelist_for_support()
901 *tmp1++ = ','; in iscsi_check_valuelist_for_support()
902 proposer_values = tmp1; in iscsi_check_valuelist_for_support()
/drivers/iio/adc/
A Dmcp3564.c1091 u64 tmp1; in mcp3564_fill_scale_tbls() local
1095 tmp1 = ((u64)ref * NANO) >> pow; in mcp3564_fill_scale_tbls()
1096 div_u64_rem(tmp1, NANO, &tmp0); in mcp3564_fill_scale_tbls()
1098 tmp1 = tmp1 * mcp3564_hwgain_frac[(2 * i) + 1]; in mcp3564_fill_scale_tbls()
1099 tmp0 = (int)div_u64(tmp1, mcp3564_hwgain_frac[2 * i]); in mcp3564_fill_scale_tbls()
A Dad4000.c535 int val, tmp0, tmp1; in ad4000_fill_scale_tbl() local
558 tmp0 = div_s64_rem(tmp2, NANO, &tmp1); in ad4000_fill_scale_tbl()
562 st->scale_tbl[0][1] = abs(tmp1); /* Fractional part */ in ad4000_fill_scale_tbl()
569 st->scale_tbl[1][1] = DIV_ROUND_CLOSEST(abs(tmp1) * 4, 5); in ad4000_fill_scale_tbl()
571 st->scale_tbl[1][1] = DIV_ROUND_CLOSEST(abs(tmp1) * 9, 10); in ad4000_fill_scale_tbl()
A Dad4170-4.c468 unsigned int tmp0, tmp1, i; in ad4170_fill_sps_tbl() local
477 &tmp1); in ad4170_fill_sps_tbl()
478 tmp1 = mult_frac(tmp1, MICRO, 32 * ad4170_sinc3_filt_fs_tbl[i]); in ad4170_fill_sps_tbl()
481 st->sps_tbl[AD4170_SINC5_AVG][i][1] = tmp1; /* Fractional part */ in ad4170_fill_sps_tbl()
485 st->sps_tbl[AD4170_SINC3][i][1] = tmp1; /* Fractional part */ in ad4170_fill_sps_tbl()
490 &tmp1); in ad4170_fill_sps_tbl()
491 tmp1 = mult_frac(tmp1, MICRO, 32 * ad4170_sinc5_filt_fs_tbl[i]); in ad4170_fill_sps_tbl()
494 st->sps_tbl[AD4170_SINC5][i][1] = tmp1; /* Fractional part */ in ad4170_fill_sps_tbl()
/drivers/crypto/caam/
A Dcaampkc.c527 pdb->tmp1_dma = dma_map_single(dev, key->tmp1, p_sz, DMA_BIDIRECTIONAL); in set_rsa_priv_f2_pdb()
616 pdb->tmp1_dma = dma_map_single(dev, key->tmp1, p_sz, DMA_BIDIRECTIONAL); in set_rsa_priv_f3_pdb()
874 kfree_sensitive(key->tmp1); in caam_rsa_free_key()
1006 rsa_key->tmp1 = kzalloc(aligned_size, GFP_KERNEL); in caam_rsa_set_priv_key_form()
1007 if (!rsa_key->tmp1) in caam_rsa_set_priv_key_form()
1041 kfree_sensitive(rsa_key->tmp1); in caam_rsa_set_priv_key_form()
A Dcaampkc.h78 u8 *tmp1; member
/drivers/iio/frequency/
A Dad9523.c423 long tmp1, tmp2; in ad9523_set_clock_provider() local
431 tmp1 = st->vco_out_freq[AD9523_VCO1] / freq; in ad9523_set_clock_provider()
433 tmp1 *= freq; in ad9523_set_clock_provider()
435 use_alt_clk_src = (abs(tmp1 - freq) > abs(tmp2 - freq)); in ad9523_set_clock_provider()
/drivers/iio/
A Dindustrialio-core.c650 int tmp0, tmp1; in __iio_format_value() local
677 tmp0 = (int)div_s64_rem(tmp2, 1000000000, &tmp1); in __iio_format_value()
679 return sysfs_emit_at(buf, offset, "-0.%09u", abs(tmp1)); in __iio_format_value()
682 abs(tmp1)); in __iio_format_value()
685 tmp0 = (int)div_s64_rem(tmp2, 1000000000LL, &tmp1); in __iio_format_value()
687 return sysfs_emit_at(buf, offset, "-0.%09u", abs(tmp1)); in __iio_format_value()
690 abs(tmp1)); in __iio_format_value()
/drivers/scsi/csiostor/
A Dcsio_rnode.c189 struct list_head *tmp, *tmp1; in csio_rn_dup_flowid() local
194 list_for_each(tmp1, &hw->sln_head) { in csio_rn_dup_flowid()
195 ln_tmp = (struct csio_lnode *) tmp1; in csio_rn_dup_flowid()

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