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Searched refs:tmp2 (Results 1 – 25 of 64) sorted by relevance

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/drivers/media/common/b2c2/
A Dflexcop-sram.c240 u8 tmp1, tmp2;
246 tmp2 = 0xa5;
252 tmp2 = 0;
255 sram_read(adapter, addr, &tmp2, 1);
256 sram_read(adapter, addr, &tmp2, 1);
260 if (tmp2 != 0xa5)
263 tmp2 = 0x5a;
269 tmp2 = 0;
272 sram_read(adapter, addr, &tmp2, 1);
273 sram_read(adapter, addr, &tmp2, 1);
[all …]
/drivers/media/dvb-frontends/
A Dec100.c80 u8 tmp, tmp2; in ec100_set_frontend() local
110 tmp2 = 0x55; in ec100_set_frontend()
114 tmp2 = 0x64; in ec100_set_frontend()
119 tmp2 = 0x72; in ec100_set_frontend()
125 ret = ec100_write_reg(state, 0x1c, tmp2); in ec100_set_frontend()
203 u8 tmp, tmp2; in ec100_read_ber() local
211 ret = ec100_read_reg(state, 0x66, &tmp2); in ec100_read_ber()
215 ber2 = (tmp2 << 8) | tmp; in ec100_read_ber()
A Dtda1004x.c1126 int tmp2; in tda1004x_read_ucblocks() local
1142 tmp2 = tda1004x_read_byte(state, TDA1004X_UNCOR); in tda1004x_read_ucblocks()
1143 if (tmp2 < 0) in tda1004x_read_ucblocks()
1145 tmp2 &= 0x7f; in tda1004x_read_ucblocks()
1146 if ((tmp2 < tmp) || (tmp2 == 0)) in tda1004x_read_ucblocks()
/drivers/cpufreq/
A Dgx-suspmod.c334 u8 tmp1, tmp2; in cpufreq_gx_verify() local
349 tmp_freq = gx_validate_speed(policy->min, &tmp1, &tmp2); in cpufreq_gx_verify()
355 tmp_freq = gx_validate_speed(policy->max, &tmp1, &tmp2); in cpufreq_gx_verify()
375 u8 tmp1, tmp2; in cpufreq_gx_target() local
383 tmp_freq = gx_validate_speed(target_freq, &tmp1, &tmp2); in cpufreq_gx_target()
386 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); in cpufreq_gx_target()
390 tmp_freq = gx_validate_speed(tmp_freq, &tmp1, &tmp2); in cpufreq_gx_target()
/drivers/watchdog/
A Dbooke_wdt.c63 unsigned long tmp2 = ppc_tb_freq; in period_to_sec() local
68 tmp2 = tmp2 / 5 * 2; in period_to_sec()
70 do_div(tmp, tmp2); in period_to_sec()
/drivers/net/
A Dmii.c264 u32 advert2 = 0, tmp2 = 0; in mii_ethtool_sset() local
279 tmp2 = advert2 & ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL); in mii_ethtool_sset()
284 tmp2 |= in mii_ethtool_sset()
290 if ((mii->supports_gmii) && (advert2 != tmp2)) in mii_ethtool_sset()
291 mii->mdio_write(dev, mii->phy_id, MII_CTRL1000, tmp2); in mii_ethtool_sset()
356 u32 advert2 = 0, tmp2 = 0; in mii_ethtool_set_link_ksettings() local
376 tmp2 = advert2 & in mii_ethtool_set_link_ksettings()
382 tmp2 |= ethtool_adv_to_mii_ctrl1000_t(advertising); in mii_ethtool_set_link_ksettings()
387 if ((mii->supports_gmii) && (advert2 != tmp2)) in mii_ethtool_set_link_ksettings()
388 mii->mdio_write(dev, mii->phy_id, MII_CTRL1000, tmp2); in mii_ethtool_set_link_ksettings()
/drivers/video/fbdev/i810/
A Di810_accel.c438 u32 tmp1, tmp2; in i810fb_init_ringbuffer() local
447 tmp2 = i810_readl(IRING + 8, mmio) & ~RBUFFER_START_MASK; in i810fb_init_ringbuffer()
449 i810_writel(IRING + 8, mmio, tmp2 | tmp1); in i810fb_init_ringbuffer()
453 tmp2 = (par->iring.size - I810_PAGESIZE) & RBUFFER_SIZE_MASK; in i810fb_init_ringbuffer()
454 i810_writel(IRING + 12, mmio, tmp1 | tmp2); in i810fb_init_ringbuffer()
A Di810_main.c233 u32 tmp1, tmp2; in i810_load_pll() local
237 tmp2 = i810_readl(DCLK_2D, mmio); in i810_load_pll()
238 tmp2 &= ~MN_MASK; in i810_load_pll()
243 tmp2 &= ~(P_OR << 16); in i810_load_pll()
464 u32 tmp1, tmp2; in i810_restore_pll() local
468 tmp2 = i810_readl(DCLK_2D, mmio); in i810_restore_pll()
470 tmp2 &= MN_MASK; in i810_restore_pll()
474 tmp2 = i810_readl(DCLK_1D, mmio); in i810_restore_pll()
476 tmp2 &= MN_MASK; in i810_restore_pll()
484 u32 tmp1, tmp2; in i810_restore_dac() local
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/drivers/net/wireless/broadcom/b43/
A Dphy_lp.c202 u16 tmp, tmp2; in lpphy_baseband_rev0_1_init() local
332 tmp2 = (tmp & 0x03E0) >> 5; in lpphy_baseband_rev0_1_init()
333 tmp2 |= tmp2 << 5; in lpphy_baseband_rev0_1_init()
336 tmp2 = (tmp & 0x1F00) >> 8; in lpphy_baseband_rev0_1_init()
337 tmp2 |= tmp2 << 5; in lpphy_baseband_rev0_1_init()
340 tmp2 = tmp & 0x00FF; in lpphy_baseband_rev0_1_init()
341 tmp2 |= tmp << 8; in lpphy_baseband_rev0_1_init()
1735 tmp2 = q_msb - 11; in lpphy_calc_rx_iq_comp()
1737 if (tmp2 >= 0) in lpphy_calc_rx_iq_comp()
2544 while (tmp2 >= freqref) { in lpphy_b2063_tune()
[all …]
/drivers/iio/afe/
A Diio-rescale.c116 s64 tmp, tmp2; in rescale_process_offset() local
132 tmp2 = ((s64)scale * 1000000000LL) + scale2; in rescale_process_offset()
133 *val = div64_s64(tmp, tmp2) + schan_off; in rescale_process_offset()
137 tmp2 = ((s64)scale * 1000000LL) + scale2; in rescale_process_offset()
138 *val = div64_s64(tmp, tmp2) + schan_off; in rescale_process_offset()
/drivers/gpu/drm/amd/amdkfd/
A Dcwsr_trap_handler_gfx10.asm1410 function save_and_clear_ib_sts(tmp1, tmp2)
1416 s_and_b32 tmp2, tmp1, SQ_WAVE_IB_STS_REPLAY_W64H_MASK
1417 s_lshl_b32 tmp2, tmp2, (TTMP11_SAVE_REPLAY_W64H_SHIFT - SQ_WAVE_IB_STS_REPLAY_W64H_SHIFT)
1418 s_or_b32 ttmp11, ttmp11, tmp2
1419 s_and_b32 tmp2, tmp1, SQ_WAVE_IB_STS_RCNT_FIRST_REPLAY_MASK
1420 s_lshl_b32 tmp2, tmp2, (TTMP11_SAVE_RCNT_FIRST_REPLAY_SHIFT - SQ_WAVE_IB_STS_FIRST_REPLAY_SHIFT)
1421 s_or_b32 ttmp11, ttmp11, tmp2
1426 function restore_ib_sts(tmp1, tmp2)
1428 s_and_b32 tmp2, tmp1, SQ_WAVE_IB_STS_RCNT_FIRST_REPLAY_MASK
1431 s_or_b32 tmp1, tmp1, tmp2
/drivers/iio/test/
A Diio-test-rescale.c595 int tmp, tmp2; in iio_str_to_nano() local
602 ret = iio_str_to_fixpoint(str, 100000000, &tmp, &tmp2); in iio_str_to_nano()
607 tmp2 *= -1; in iio_str_to_nano()
609 *nano = (s64)tmp * 1000000000UL + tmp2; in iio_str_to_nano()
/drivers/scsi/sym53c8xx_2/
A Dsym_fw.c350 u32 opcode, new, old, tmp1, tmp2; in sym_fw_bind_script() local
409 tmp2 = cur[2]; in sym_fw_bind_script()
410 if ((tmp1 ^ tmp2) & 3) { in sym_fw_bind_script()
/drivers/target/iscsi/
A Discsi_target_parameters.c868 char *tmp1 = NULL, *tmp2 = NULL; in iscsi_check_valuelist_for_support() local
887 tmp2 = strchr(acceptor_values, ','); in iscsi_check_valuelist_for_support()
888 if (tmp2) in iscsi_check_valuelist_for_support()
889 *tmp2 = '\0'; in iscsi_check_valuelist_for_support()
891 if (tmp2) in iscsi_check_valuelist_for_support()
892 *tmp2 = ','; in iscsi_check_valuelist_for_support()
895 if (tmp2) in iscsi_check_valuelist_for_support()
896 *tmp2++ = ','; in iscsi_check_valuelist_for_support()
898 acceptor_values = tmp2; in iscsi_check_valuelist_for_support()
/drivers/gpu/drm/amd/amdgpu/
A Duvd_v3_1.c209 u32 tmp, tmp2; in uvd_v3_1_set_dcm() local
221 tmp2 = UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN_MASK | in uvd_v3_1_set_dcm()
226 tmp2 = 0; in uvd_v3_1_set_dcm()
230 WREG32_UVD_CTX(ixUVD_CGC_CTRL2, tmp2); in uvd_v3_1_set_dcm()
A Duvd_v4_2.c638 u32 tmp, tmp2; in uvd_v4_2_set_dcm() local
650 tmp2 = UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN_MASK | in uvd_v4_2_set_dcm()
655 tmp2 = 0; in uvd_v4_2_set_dcm()
659 WREG32_UVD_CTX(ixUVD_CGC_CTRL2, tmp2); in uvd_v4_2_set_dcm()
/drivers/net/ethernet/cavium/liquidio/
A Drequest_manager.c772 struct list_head *tmp, *tmp2; in octeon_free_sc_done_list() local
785 list_for_each_safe(tmp, tmp2, &done_sc_list->head) { in octeon_free_sc_done_list()
812 struct list_head *tmp, *tmp2; in octeon_free_sc_zombie_list() local
820 list_for_each_safe(tmp, tmp2, &zombie_sc_list->head) { in octeon_free_sc_zombie_list()
835 struct list_head *tmp, *tmp2; in octeon_free_sc_buffer_pool() local
842 list_for_each_safe(tmp, tmp2, &oct->sc_buf_pool.head) { in octeon_free_sc_buffer_pool()
/drivers/mmc/host/
A Ddw_mmc-exynos.c586 unsigned int tmp2; in dw_mci_exynos_set_data_timeout() local
606 tmp2 = (((unsigned int)tmp / 0xFFFFFF) + 1) & 0x7; in dw_mci_exynos_set_data_timeout()
607 tmout |= tmp2 << 8; in dw_mci_exynos_set_data_timeout()
610 tmp = tmp - ((tmp2 - 1) * 0xFFFFFF); in dw_mci_exynos_set_data_timeout()
/drivers/phy/realtek/
A Dphy-rtk-usb3.c268 u16 tmp1, tmp2; in do_rtk_phy_init() local
271 tmp2 = rx_offset_range & range_mask; in do_rtk_phy_init()
272 tmp2 += (1 << 2); in do_rtk_phy_init()
273 rx_offset_range = tmp1 | (tmp2 & range_mask); in do_rtk_phy_init()
/drivers/iio/
A Dindustrialio-core.c651 s64 tmp2; in __iio_format_value() local
676 tmp2 = div_s64((s64)vals[0] * 1000000000LL, vals[1]); in __iio_format_value()
677 tmp0 = (int)div_s64_rem(tmp2, 1000000000, &tmp1); in __iio_format_value()
678 if ((tmp2 < 0) && (tmp0 == 0)) in __iio_format_value()
684 tmp2 = shift_right((s64)vals[0] * 1000000000LL, vals[1]); in __iio_format_value()
685 tmp0 = (int)div_s64_rem(tmp2, 1000000000LL, &tmp1); in __iio_format_value()
686 if (tmp0 == 0 && tmp2 < 0) in __iio_format_value()
703 tmp2 = (s64)((((u64)vals[1]) << 32) | (u32)vals[0]); in __iio_format_value()
704 return sysfs_emit_at(buf, offset, "%lld", tmp2); in __iio_format_value()
/drivers/video/fbdev/aty/
A Dmach64_ct.c283 u8 tmp, tmp2; in aty_set_pll_ct() local
318 tmp2 = par->clk_wr_offset << 1; in aty_set_pll_ct()
320 tmp &= ~(0x03U << tmp2); in aty_set_pll_ct()
321 tmp |= ((pll->ct.vclk_post_div & 0x03U) << tmp2); in aty_set_pll_ct()
A Dradeon_pm.c1436 u32 tmp, tmp2; in radeon_pm_reset_pad_ctlr_strength() local
1445 tmp2 = INREG(PAD_CTLR_STRENGTH); in radeon_pm_reset_pad_ctlr_strength()
1446 if (tmp != tmp2) { in radeon_pm_reset_pad_ctlr_strength()
1447 tmp = tmp2; in radeon_pm_reset_pad_ctlr_strength()
2216 u32 tmp, tmp2;
2493 tmp2 = INREG(FP_GEN_CNTL);
2501 tmp2 &= ~2;
2502 tmp2 |= FP_TMDS_EN;
2503 OUTREG(FP_GEN_CNTL, tmp2);
2505 tmp2 |= FP_FPON;
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/drivers/crypto/caam/
A Dcaampkc.c533 pdb->tmp2_dma = dma_map_single(dev, key->tmp2, q_sz, DMA_BIDIRECTIONAL); in set_rsa_priv_f2_pdb()
622 pdb->tmp2_dma = dma_map_single(dev, key->tmp2, q_sz, DMA_BIDIRECTIONAL); in set_rsa_priv_f3_pdb()
875 kfree_sensitive(key->tmp2); in caam_rsa_free_key()
1011 rsa_key->tmp2 = kzalloc(aligned_size, GFP_KERNEL); in caam_rsa_set_priv_key_form()
1012 if (!rsa_key->tmp2) in caam_rsa_set_priv_key_form()
1039 kfree_sensitive(rsa_key->tmp2); in caam_rsa_set_priv_key_form()
/drivers/gpu/drm/amd/display/dc/dce120/
A Ddce120_timing_generator.c433 uint32_t tmp2 = 0; in dce120_timing_generator_program_blanking() local
468 tmp2 = tmp1 + timing->h_addressable + in dce120_timing_generator_program_blanking()
474 CRTC_H_BLANK_START, tmp2); in dce120_timing_generator_program_blanking()
477 tmp2 = tmp1 + timing->v_addressable + timing->v_border_top + in dce120_timing_generator_program_blanking()
483 CRTC_V_BLANK_START, tmp2); in dce120_timing_generator_program_blanking()
/drivers/gpu/drm/
A Ddrm_modes.c714 int tmp1, tmp2; in drm_cvt_mode() local
724 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 + in drm_cvt_mode()
726 hperiod = tmp1 * 2 / (tmp2 * vfieldrate); in drm_cvt_mode()
780 int tmp1, tmp2; in drm_cvt_mode() local
784 tmp2 = vdisplay_rnd + 2 * vmargin; in drm_cvt_mode()
785 hperiod = tmp1 / (tmp2 * vfieldrate); in drm_cvt_mode()
880 unsigned int tmp1, tmp2; in drm_gtf_mode_complex() local
929 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) * in drm_gtf_mode_complex()
931 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1; in drm_gtf_mode_complex()

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