| /drivers/gpu/drm/i915/display/ |
| A D | intel_psr_regs.h | 27 #define EDP_PSR_CTL(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _SRD_CTL_A) argument
70 #define TRANS_PSR_IMR(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PSR_IMR_A) argument
71 #define TRANS_PSR_IIR(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PSR_IIR_A) argument
105 #define EDP_PSR_STATUS(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _SRD_STATUS_A) argument
137 #define EDP_PSR_DEBUG(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _SRD_DEBUG_A) argument
157 #define EDP_PSR2_CTL(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PSR2_CTL_A) argument
256 #define LNL_SFF_CTL(tran) _MMIO_TRANS(tran, _LNL_SFF_CTL_A, _LNL_SFF_CTL_B) argument
261 #define LNL_CFF_CTL(tran) _MMIO_TRANS(tran, _LNL_CFF_CTL_A, _LNL_CFF_CTL_B) argument
270 #define PR_ALPM_CTL(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PR_ALPM_CTL_A) argument
280 #define ALPM_CTL(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _ALPM_CTL_A) argument
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| A D | intel_display_reg_defs.h | 20 #define _TRANS(tran, a, b) _PICK_EVEN(tran, a, b) argument
27 #define _MMIO_TRANS(tran, a, b) _MMIO(_TRANS(tran, a, b)) argument
42 #define _MMIO_TRANS2(display, tran, reg) _MMIO(DISPLAY_INFO(display)->trans_offsets[(tran)] - \ argument
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| A D | intel_display_regs.h | 1010 #define PIPE_DATA_M1(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_DATA_M1) argument
1014 #define PIPE_DATA_N1(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_DATA_N1) argument
1018 #define PIPE_DATA_M2(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_DATA_M2) argument
1022 #define PIPE_DATA_N2(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_DATA_N2) argument
1026 #define PIPE_LINK_M1(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_M1) argument
1030 #define PIPE_LINK_N1(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_N1) argument
1034 #define PIPE_LINK_M2(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_M2) argument
1038 #define PIPE_LINK_N2(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_N2) argument
2290 #define TGL_DP_TP_CTL(dev_priv, tran) _MMIO_TRANS2(dev_priv, (tran), _TGL_DP_TP_CTL_A) argument
2449 #define TRANS_CLK_SEL(tran) _MMIO_TRANS(tran, _TRANS_CLK_SEL_A, _TRANS_CLK_SEL_B) argument
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| A D | intel_display_power.h | 124 #define POWER_DOMAIN_TRANSCODER(tran) \ argument
125 ((tran) == TRANSCODER_EDP ? POWER_DOMAIN_TRANSCODER_EDP : \
126 (enum intel_display_power_domain)((tran) - TRANSCODER_A + POWER_DOMAIN_TRANSCODER_A))
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| /drivers/net/ethernet/qlogic/qlcnic/ |
| A D | qlcnic_sriov_pf.c | 884 static int qlcnic_sriov_pf_create_rx_ctx_cmd(struct qlcnic_bc_trans *tran, in qlcnic_sriov_pf_create_rx_ctx_cmd() argument
887 struct qlcnic_vf_info *vf = tran->vf; in qlcnic_sriov_pf_create_rx_ctx_cmd()
1237 static int qlcnic_sriov_pf_cfg_intrcoal_cmd(struct qlcnic_bc_trans *tran, in qlcnic_sriov_pf_cfg_intrcoal_cmd() argument
1240 struct qlcnic_vf_info *vf = tran->vf; in qlcnic_sriov_pf_cfg_intrcoal_cmd()
1431 static int qlcnic_sriov_pf_cfg_guest_vlan_cmd(struct qlcnic_bc_trans *tran, in qlcnic_sriov_pf_cfg_guest_vlan_cmd() argument
1434 struct qlcnic_vf_info *vf = tran->vf; in qlcnic_sriov_pf_cfg_guest_vlan_cmd()
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| /drivers/tty/serial/ |
| A D | max3100.c | 162 struct spi_transfer tran = { in max3100_sr() local
170 spi_message_add_tail(&tran, &message); in max3100_sr()
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