| /drivers/gpu/drm/bridge/analogix/ |
| A D | Kconfig | 13 ANX6345 transforms the LVTTL RGB output of an 25 designed for portable devices. The ANX78XX transforms
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| /drivers/gpu/drm/amd/display/dc/resource/dce60/ |
| A D | dce60_resource.c | 805 if (pool->base.transforms[i] != NULL) in dce60_resource_destruct() 806 dce60_transform_destroy(&pool->base.transforms[i]); in dce60_resource_destruct() 1061 pool->base.transforms[i] = dce60_transform_create(ctx, i); in dce60_construct() 1062 if (pool->base.transforms[i] == NULL) { in dce60_construct() 1259 pool->base.transforms[i] = dce60_transform_create(ctx, i); in dce61_construct() 1260 if (pool->base.transforms[i] == NULL) { in dce61_construct() 1456 pool->base.transforms[i] = dce60_transform_create(ctx, i); in dce64_construct() 1457 if (pool->base.transforms[i] == NULL) { in dce64_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dce80/ |
| A D | dce80_resource.c | 811 if (pool->base.transforms[i] != NULL) in dce80_resource_destruct() 812 dce80_transform_destroy(&pool->base.transforms[i]); in dce80_resource_destruct() 1071 pool->base.transforms[i] = dce80_transform_create(ctx, i); in dce80_construct() 1072 if (pool->base.transforms[i] == NULL) { in dce80_construct() 1271 pool->base.transforms[i] = dce80_transform_create(ctx, i); in dce81_construct() 1272 if (pool->base.transforms[i] == NULL) { in dce81_construct() 1468 pool->base.transforms[i] = dce80_transform_create(ctx, i); in dce83_construct() 1469 if (pool->base.transforms[i] == NULL) { in dce83_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dce110/ |
| A D | dce110_resource.c | 820 if (pool->base.transforms[i] != NULL) in dce110_resource_destruct() 821 dce110_transform_destroy(&pool->base.transforms[i]); in dce110_resource_destruct() 1140 pipe_ctx->plane_res.xfm = pool->transforms[underlay_idx]; in dce110_acquire_underlay() 1273 pool->transforms[pool->pipe_count] = &dce110_xfmv->base; in underlay_create() 1469 pool->base.transforms[i] = dce110_transform_create(ctx, i); in dce110_resource_construct() 1470 if (pool->base.transforms[i] == NULL) { in dce110_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dce100/ |
| A D | dce100_resource.c | 764 if (pool->base.transforms[i] != NULL) in dce100_resource_destruct() 765 dce100_transform_destroy(&pool->base.transforms[i]); in dce100_resource_destruct() 1108 pool->base.transforms[i] = dce100_transform_create(ctx, i); in dce100_resource_construct() 1109 if (pool->base.transforms[i] == NULL) { in dce100_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/resource/dce120/ |
| A D | dce120_resource.c | 605 if (pool->base.transforms[i] != NULL) in dce120_resource_destruct() 606 dce120_transform_destroy(&pool->base.transforms[i]); in dce120_resource_destruct() 1204 pool->base.transforms[j] = dce120_transform_create(ctx, i); in dce120_resource_construct() 1205 if (pool->base.transforms[i] == NULL) { in dce120_resource_construct()
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| /drivers/comedi/drivers/ |
| A D | jr3_pci.h | 725 struct intern_transform transforms[0x10]; /* offset 0x0200 */ member
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| A D | jr3_pci.c | 140 set_u16(&sensor->transforms[num].link[i].link_type, in set_transforms() 143 set_s16(&sensor->transforms[num].link[i].link_amount, in set_transforms()
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| /drivers/gpu/drm/amd/display/dc/resource/dce112/ |
| A D | dce112_resource.c | 785 if (pool->base.transforms[i] != NULL) in dce112_resource_destruct() 786 dce112_transform_destroy(&pool->base.transforms[i]); in dce112_resource_destruct() 1356 pool->base.transforms[i] = dce112_transform_create(ctx, i); in dce112_resource_construct() 1357 if (pool->base.transforms[i] == NULL) { in dce112_resource_construct()
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| /drivers/gpu/drm/amd/display/dc/inc/ |
| A D | core_types.h | 247 struct transform *transforms[MAX_PIPES]; member
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| /drivers/bus/ |
| A D | Kconfig | 146 Driver to enable ocp2scp module which transforms ocp interface
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| /drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| A D | dce110_hwseq.c | 2814 xfm = dc->res_pool->transforms[i]; in dce110_init_hw() 3078 dc->res_pool->transforms[fe_idx]->funcs->transform_reset( in dce110_power_down_fe() 3079 dc->res_pool->transforms[fe_idx]); in dce110_power_down_fe()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| A D | dcn20_resource.c | 1493 next_odm_pipe->plane_res.xfm = pool->transforms[next_odm_pipe->pipe_idx]; in dcn20_split_stream_for_odm() 1549 secondary_pipe->plane_res.xfm = pool->transforms[secondary_pipe->pipe_idx]; in dcn20_split_stream_for_mpc()
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| /drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_resource.c | 3689 pipe_ctx->plane_res.xfm = pool->transforms[id_src[i]]; in acquire_resource_from_hw_enabled_state() 3834 pipe_ctx->plane_res.xfm = pool->transforms[pipe_idx]; in acquire_otg_master_pipe_for_stream() 5458 sec_pipe->plane_res.xfm = pool->transforms[pipe_idx]; in dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy()
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| /drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| A D | dcn_calcs.c | 539 secondary_pipe->plane_res.xfm = pool->transforms[secondary_pipe->pipe_idx]; in split_stream_across_pipes()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| A D | dcn30_resource.c | 1536 sec_pipe->plane_res.xfm = pool->transforms[pipe_idx]; in dcn30_split_stream_for_mpc_or_odm()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| A D | dcn32_resource.c | 2852 free_pipe->plane_res.xfm = pool->transforms[free_pipe_idx]; in dcn32_acquire_free_pipe_as_secondary_opp_head()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| A D | dcn32_fpu.c | 1890 sec_pipe->plane_res.xfm = pool->transforms[pipe_idx]; in dcn32_split_stream_for_mpc_or_odm()
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