Home
last modified time | relevance | path

Searched refs:tx_delay_ps (Results 1 – 3 of 3) sorted by relevance

/drivers/net/ethernet/stmicro/stmmac/
A Ddwmac-ingenic.c238 u32 tx_delay_ps, rx_delay_ps; in ingenic_mac_probe() local
266 if (!of_property_read_u32(pdev->dev.of_node, "tx-clk-delay-ps", &tx_delay_ps)) { in ingenic_mac_probe()
267 if (tx_delay_ps >= MACPHYC_TX_DELAY_PS_MIN && in ingenic_mac_probe()
268 tx_delay_ps <= MACPHYC_TX_DELAY_PS_MAX) { in ingenic_mac_probe()
269 mac->tx_delay = tx_delay_ps * 1000; in ingenic_mac_probe()
271 dev_err(&pdev->dev, "Invalid TX clock delay: %dps\n", tx_delay_ps); in ingenic_mac_probe()
A Ddwmac-mediatek.c458 u32 tx_delay_ps, rx_delay_ps; in mediatek_dwmac_config_dt() local
466 if (!of_property_read_u32(plat->np, "mediatek,tx-delay-ps", &tx_delay_ps)) { in mediatek_dwmac_config_dt()
467 if (tx_delay_ps < plat->variant->tx_delay_max) { in mediatek_dwmac_config_dt()
468 mac_delay->tx_delay = tx_delay_ps; in mediatek_dwmac_config_dt()
470 dev_err(plat->dev, "Invalid TX clock delay: %dps\n", tx_delay_ps); in mediatek_dwmac_config_dt()
/drivers/net/ethernet/microchip/sparx5/lan969x/
A Dlan969x_rgmii.c157 u32 tx_clk_sel, rx_clk_sel, tx_delay_ps = 0, rx_delay_ps = 0; in lan969x_rgmii_delay_config() local
165 &tx_delay_ps); in lan969x_rgmii_delay_config()
171 err = lan969x_rgmii_get_clk_delay_sel(port, tx_delay_ps, &tx_clk_sel); in lan969x_rgmii_delay_config()
189 HSIO_WRAP_DLL_CFG_DLL_CLK_ENA_SET(!!tx_delay_ps) | in lan969x_rgmii_delay_config()

Completed in 9 milliseconds