| /drivers/net/ethernet/intel/ice/ |
| A D | ice_lib.c | 100 sizeof(*vsi->txq_map), GFP_KERNEL); in ice_vsi_alloc_arrays()
102 if (!vsi->txq_map) in ice_vsi_alloc_arrays()
125 devm_kfree(dev, vsi->txq_map); in ice_vsi_alloc_arrays()
327 devm_kfree(dev, vsi->txq_map); in ice_vsi_free_arrays()
328 vsi->txq_map = NULL; in ice_vsi_free_arrays()
760 .vsi_map = vsi->txq_map, in ice_vsi_get_qs()
804 clear_bit(vsi->txq_map[i], pf->avail_txqs); in ice_vsi_put_qs()
805 vsi->txq_map[i] = ICE_INVAL_Q_INDEX; in ice_vsi_put_qs()
1404 ring->reg_idx = vsi->txq_map[i]; in ice_vsi_alloc_rings()
2605 wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), 0); in ice_vsi_release_msix()
[all …]
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| A D | ice_base.c | 1070 wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), val); in ice_cfg_txq_interrupt()
1074 wr32(hw, QINT_TQCTL(vsi->txq_map[xdp_txq]), in ice_cfg_txq_interrupt()
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| A D | ice.h | 393 u16 *txq_map; /* index in pf->avail_txqs */ member
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| A D | ice_main.c | 2646 xdp_ring->reg_idx = vsi->txq_map[xdp_q_idx]; in ice_xdp_alloc_setup_rings()
2787 .vsi_map = vsi->txq_map, in ice_prepare_xdp_rings()
2859 clear_bit(vsi->txq_map[i + vsi->alloc_txq], pf->avail_txqs); in ice_prepare_xdp_rings()
2860 vsi->txq_map[i + vsi->alloc_txq] = ICE_INVAL_Q_INDEX; in ice_prepare_xdp_rings()
2895 clear_bit(vsi->txq_map[i + vsi->alloc_txq], pf->avail_txqs); in ice_destroy_xdp_rings()
2896 vsi->txq_map[i + vsi->alloc_txq] = ICE_INVAL_Q_INDEX; in ice_destroy_xdp_rings()
8259 rd32(hw, QTX_COMM_HEAD(vsi->txq_map[txqueue]))); in ice_tx_timeout()
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| A D | ice_virtchnl.c | 1433 u32 pfq = vsi->txq_map[q_idx]; in ice_vf_ena_txq_interrupt()
1732 qmap = map->txq_map; in ice_cfg_interrupt()
1798 (!vector_id && (map->rxq_map || map->txq_map))) { in ice_vc_cfg_irq_map_msg()
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| A D | ice_sriov.c | 295 reg = FIELD_PREP(VPLAN_TX_QBASE_VFFIRSTQ_M, vsi->txq_map[0]) | in ice_ena_vf_q_mappings()
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| A D | ice_lag.c | 429 qid = pf->vsi[vsi_num]->txq_map[q_ctx->q_handle]; in ice_lag_qbuf_recfg()
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| /drivers/net/wireless/ath/ath9k/ |
| A D | link.c | 32 txq = sc->tx.txq_map[i]; in ath_tx_complete_check()
211 txctl.txq = sc->tx.txq_map[IEEE80211_AC_BE]; in ath_paprd_send_frame()
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| A D | debug.h | 197 #define PR_QNUM(_n) sc->tx.txq_map[_n]->axq_qnum
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| A D | tx99.c | 126 txctl.txq = sc->tx.txq_map[IEEE80211_AC_VO]; in ath9k_tx99_init()
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| A D | init.c | 416 sc->tx.txq_map[i] = ath_txq_setup(sc, ATH9K_TX_QUEUE_DATA, i); in ath9k_init_queues()
417 sc->tx.txq_map[i]->mac80211_qnum = i; in ath9k_init_queues()
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| A D | xmit.c | 219 txq = sc->tx.txq_map[q]; in ath_txq_skb_done()
257 if (tid->txq == sc->tx.txq_map[q]) { in ath_tid_pull()
2025 txq = sc->tx.txq_map[i]; in ath_txq_schedule_all()
2362 if (txq == sc->tx.txq_map[q]) { in ath_tx_start()
2873 tid->txq = sc->tx.txq_map[acno]; in ath_tx_node_init()
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| A D | gpio.c | 430 txq = sc->tx.txq_map[IEEE80211_AC_BE]; in ath9k_init_btcoex()
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| A D | beacon.c | 50 txq = sc->tx.txq_map[IEEE80211_AC_BE]; in ath9k_beaconq_config()
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| A D | channel.c | 1011 txctl.txq = sc->tx.txq_map[IEEE80211_AC_VO]; in ath_scan_send_probe()
1132 txctl.txq = sc->tx.txq_map[IEEE80211_AC_VO]; in ath_chanctx_send_vif_ps_frame()
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| A D | ath9k.h | 293 struct ath_txq *txq_map[IEEE80211_NUM_ACS]; member
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| A D | main.c | 814 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)]; in ath9k_tx()
1727 txq = sc->tx.txq_map[queue]; in ath9k_conf_tx()
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| A D | debug.c | 632 txq = sc->tx.txq_map[i]; in read_file_queues()
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| /drivers/net/ethernet/cisco/enic/ |
| A D | enic_main.c | 838 unsigned int txq_map; in enic_hard_start_xmit() local
841 txq_map = skb_get_queue_mapping(skb) % enic->wq_count; in enic_hard_start_xmit()
842 wq = &enic->wq[txq_map].vwq; in enic_hard_start_xmit()
850 txq = netdev_get_tx_queue(netdev, txq_map); in enic_hard_start_xmit()
865 spin_lock(&enic->wq[txq_map].lock); in enic_hard_start_xmit()
872 spin_unlock(&enic->wq[txq_map].lock); in enic_hard_start_xmit()
889 spin_unlock(&enic->wq[txq_map].lock); in enic_hard_start_xmit()
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| /drivers/net/ethernet/marvell/ |
| A D | mvneta.c | 1497 int rxq_map = 0, txq_map = 0; in mvneta_defaults_set() local
1506 txq_map |= MVNETA_CPU_TXQ_ACCESS(txq); in mvneta_defaults_set()
1513 txq_map = (cpu == pp->rxq_def) ? in mvneta_defaults_set()
1517 txq_map = MVNETA_CPU_TXQ_ACCESS_ALL_MASK; in mvneta_defaults_set()
1521 mvreg_write(pp, MVNETA_CPU_MAP(cpu), rxq_map | txq_map); in mvneta_defaults_set()
4385 int rxq_map = 0, txq_map = 0; in mvneta_percpu_elect() local
4401 txq_map = (cpu == elected_cpu) ? in mvneta_percpu_elect()
4404 txq_map = mvreg_read(pp, MVNETA_CPU_MAP(cpu)) & in mvneta_percpu_elect()
4407 mvreg_write(pp, MVNETA_CPU_MAP(cpu), rxq_map | txq_map); in mvneta_percpu_elect()
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| /drivers/net/ethernet/intel/iavf/ |
| A D | iavf_virtchnl.c | 521 vecmap->txq_map = q_vector->ring_mask; in iavf_map_queues()
530 vecmap->txq_map = 0; in iavf_map_queues()
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| /drivers/net/ethernet/intel/i40e/ |
| A D | i40e_virtchnl_pf.c | 391 if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) { in i40e_config_irq_link_list()
402 tempmap = vecmap->txq_map; in i40e_config_irq_link_list()
2512 if (i40e_validate_queue_map(vf, vsi_id, map->txq_map)) { in i40e_vc_config_irq_map_msg()
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