| /drivers/gpu/drm/amd/display/dc/dccg/dcn20/ |
| A D | dcn20_dccg.h | 244 type DPPCLK0_EN;\ 245 type DPPCLK1_EN;\ 246 type DPPCLK2_EN;\ 247 type DPPCLK3_EN;\ 248 type DSCCLK0_EN;\ 249 type DSCCLK1_EN;\ 250 type DSCCLK2_EN;\ 251 type DSCCLK3_EN;\ 345 type DPDTO0_INT;\ 347 type DPDTO1_INT;\ [all …]
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| /drivers/gpu/drm/amd/display/dc/dio/dcn10/ |
| A D | dcn10_link_encoder.h | 231 type DIG_MODE;\ 241 type DPHY_SYM1;\ 242 type DPHY_SYM2;\ 243 type DPHY_SYM3;\ 244 type DPHY_SYM4;\ 245 type DPHY_SYM5;\ 246 type DPHY_SYM6;\ 247 type DPHY_SYM7;\ 248 type DPHY_SYM8;\ 273 type DC_HPD_EN;\ [all …]
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| A D | dcn10_stream_encoder.h | 420 type HDMI_GC_CONT;\ 421 type HDMI_GC_SEND;\ 429 type DP_MSE_RATE_X;\ 455 type DP_VID_N;\ 456 type DP_VID_M;\ 457 type DIG_START;\ 483 type DP_SEC_AUD_N;\ 499 type DP_MSA_MISC0;\ 511 type DP_VID_N_MUL;\ 528 type DP_DSC_MODE;\ [all …]
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| /drivers/gpu/drm/amd/display/dc/dpp/dcn10/ |
| A D | dcn10_dpp.h | 488 type PIXEL_DEPTH; \ 492 type DITHER_EN; \ 521 type DSCL_MODE; \ 526 type MPC_WIDTH; \ 527 type MPC_HEIGHT; \ 561 type CM_COMA_C11; \ 562 type CM_COMA_C12; \ 563 type CM_COMA_C33; \ 1073 type OUTPUT_FP; \ 1079 type CUR0_MODE; \ [all …]
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| /drivers/gpu/drm/amd/display/dc/hubbub/dcn10/ |
| A D | dcn10_hubbub.h | 224 type MALL_IN_USE 292 type FB_BASE;\ 293 type FB_TOP;\ 294 type FB_OFFSET;\ 295 type AGP_BOT;\ 296 type AGP_TOP;\ 297 type AGP_BASE;\ 389 type DET_DEPTH;\ 390 type DET0_SIZE;\ 391 type DET1_SIZE;\ [all …]
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| /drivers/net/ethernet/microchip/vcap/ |
| A D | vcap_model_kunit.c | 19 .type = VCAP_FIELD_U32, 24 .type = VCAP_FIELD_BIT, 29 .type = VCAP_FIELD_U32, 34 .type = VCAP_FIELD_U32, 39 .type = VCAP_FIELD_U32, 44 .type = VCAP_FIELD_U32, 49 .type = VCAP_FIELD_BIT, 54 .type = VCAP_FIELD_U32, 59 .type = VCAP_FIELD_U32, 64 .type = VCAP_FIELD_U32, [all …]
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| /drivers/net/ethernet/microchip/sparx5/lan969x/ |
| A D | lan969x_vcap_ag_api.c | 18 .type = VCAP_FIELD_BIT, 23 .type = VCAP_FIELD_BIT, 28 .type = VCAP_FIELD_U32, 33 .type = VCAP_FIELD_U32, 38 .type = VCAP_FIELD_U32, 43 .type = VCAP_FIELD_U72, 48 .type = VCAP_FIELD_BIT, 53 .type = VCAP_FIELD_BIT, 58 .type = VCAP_FIELD_U32, 63 .type = VCAP_FIELD_U32, [all …]
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| /drivers/net/ethernet/microchip/sparx5/ |
| A D | sparx5_vcap_ag_api.c | 19 .type = VCAP_FIELD_BIT, 24 .type = VCAP_FIELD_BIT, 29 .type = VCAP_FIELD_U32, 34 .type = VCAP_FIELD_U32, 39 .type = VCAP_FIELD_U32, 44 .type = VCAP_FIELD_U72, 49 .type = VCAP_FIELD_BIT, 54 .type = VCAP_FIELD_BIT, 59 .type = VCAP_FIELD_U32, 64 .type = VCAP_FIELD_U32, [all …]
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| /drivers/net/ethernet/microchip/lan966x/ |
| A D | lan966x_vcap_ag_api.c | 11 .type = VCAP_FIELD_BIT, 16 .type = VCAP_FIELD_U32, 21 .type = VCAP_FIELD_U32, 26 .type = VCAP_FIELD_BIT, 31 .type = VCAP_FIELD_BIT, 36 .type = VCAP_FIELD_BIT, 41 .type = VCAP_FIELD_BIT, 46 .type = VCAP_FIELD_BIT, 51 .type = VCAP_FIELD_BIT, 56 .type = VCAP_FIELD_BIT, [all …]
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| /drivers/gpu/drm/amd/display/dc/optc/dcn10/ |
| A D | dcn10_optc.h | 465 type OTG_BUSY;\ 483 type VTG0_FP2;\ 509 type CRC0_R_CR;\ 510 type CRC0_G_Y;\ 511 type CRC0_B_CB;\ 512 type CRC1_R_CR;\ 513 type CRC1_G_Y;\ 514 type CRC1_B_CB;\ 515 type CRC2_R_CR;\ 516 type CRC2_G_Y;\ [all …]
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| /drivers/gpu/drm/amd/display/dc/dwb/dcn30/ |
| A D | dcn30_dwb.h | 410 type DWB_ENABLE;\ 429 type FC_FI_EN;\ 430 type FC_FI_PHASE;\ 441 type DWB_CRC_EN;\ 451 type DWB_CRC_SIG_A;\ 452 type OUT_FORMAT;\ 453 type OUT_DENORM;\ 454 type OUT_MAX;\ 455 type OUT_MIN;\ 476 type DWBSCL_MODE;\ [all …]
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| /drivers/gpu/drm/amd/display/dc/dsc/dcn20/ |
| A D | dcn20_dsc.h | 270 type DSC_CLOCK_EN; \ 273 type DSC_DBG_EN; \ 312 type VBR_ENABLE; \ 313 type SIMPLE_422; \ 314 type CONVERT_RGB; \ 316 type NATIVE_422; \ 317 type NATIVE_420; \ 318 type CHUNK_SIZE; \ 319 type PIC_WIDTH; \ 320 type PIC_HEIGHT; \ [all …]
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| /drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/ |
| A D | dcn20_mmhubbub.h | 259 type MCIF_WB_P_VMID;\ 276 type MCIF_WB_BUF_1_MODE;\ 279 type MCIF_WB_BUF_1_FIELD;\ 288 type MCIF_WB_BUF_1_TMZ;\ 296 type MCIF_WB_BUF_2_MODE;\ 299 type MCIF_WB_BUF_2_FIELD;\ 308 type MCIF_WB_BUF_2_TMZ;\ 316 type MCIF_WB_BUF_3_MODE;\ 328 type MCIF_WB_BUF_3_TMZ;\ 336 type MCIF_WB_BUF_4_MODE;\ [all …]
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| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_dwb.h | 203 type WB_ENABLE;\ 208 type WB_LB_LS_DIS;\ 209 type WB_LB_SD_DIS;\ 217 type CNV_OUT_BPC;\ 246 type WB_DEBUG_EN;\ 247 type WB_DEBUG_SEL;\ 251 type WB_DBG_CMAP;\ 254 type WB_HW_DEBUG;\ 269 type WBSCL_MODE;\ 318 type WBSCL_DEBUG;\ [all …]
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| /drivers/gpu/drm/amd/display/dc/hubp/dcn20/ |
| A D | dcn20_hubp.h | 184 type DMDATA_MODE;\ 186 type DMDATA_REPEAT;\ 187 type DMDATA_SIZE;\ 194 type DMDATA_DONE;\ 204 type VMID 214 type VM_GROUP_SIZE 233 type ROW_TTU_MODE; \ 234 type NUM_PKRS 240 type HUBP_SOFT_RESET 244 type USE_MALL_SEL; \ [all …]
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| /drivers/gpu/drm/amd/display/dc/hubp/dcn10/ |
| A D | dcn10_hubp.h | 466 type NUM_PIPES;\ 467 type NUM_BANKS;\ 469 type NUM_SE;\ 472 type SW_MODE;\ 473 type META_LINEAR;\ 474 type RB_ALIGNED;\ 476 type PITCH;\ 477 type META_PITCH;\ 478 type PITCH_C;\ 549 type CHUNK_SIZE;\ [all …]
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| /drivers/media/pci/saa7134/ |
| A D | saa7134-cards.c | 84 .type = SAA7134_INPUT_TV, 108 .type = SAA7134_INPUT_TV, 139 .type = SAA7134_INPUT_MUTE, 155 .type = SAA7134_INPUT_TV, 196 .type = SAA7134_INPUT_TV, 225 .type = SAA7134_INPUT_TV, 273 .type = SAA7134_INPUT_TV, 328 .type = SAA7134_INPUT_TV, 349 .type = SAA7134_INPUT_TV, 374 .type = SAA7134_INPUT_TV, [all …]
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| /drivers/gpu/drm/amd/display/dc/dpp/dcn401/ |
| A D | dcn401_dpp.h | 384 type CUR0_FP_BIAS_G_Y; \ 388 type CUR0_MATRIX_MODE; \ 403 type LUMA_KEYER_EN; \ 405 type SCL_SC_LTONL_EN; \ 406 type SCL_EASF_H_EN; \ 463 type SCL_EASF_V_EN; \ 526 type SCL_SC_MATRIX_C0; \ 530 type ISHARP_EN; \ 538 type ISHARP_LBA_MODE; \ 556 type ISHARP_FMT_MODE; \ [all …]
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_dwb.h | 149 type WB_ENABLE;\ 153 type WB_LB_LS_DIS;\ 154 type WB_LB_SD_DIS;\ 155 type WB_LUT_LS_DIS;\ 156 type CNV_WINDOW_CROP_EN;\ 157 type CNV_STEREO_TYPE;\ 159 type CNV_EYE_SELECTION;\ 162 type CNV_STEREO_SPLIT;\ 163 type CNV_NEW_CONTENT;\ 165 type WB_SOFT_RESET;\ [all …]
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| /drivers/gpu/drm/amd/display/dc/mpc/dcn30/ |
| A D | dcn30_mpc.h | 647 type MPC_DWB0_MUX;\ 648 type MPC_DWB0_MUX_STATUS;\ 658 type MPC_RMU0_MUX; \ 659 type MPC_RMU1_MUX; \ 677 type MPCC_OGAM_SELECT; \ 690 type MPC_RMU_3DLUT_MODE; \ 691 type MPC_RMU_3DLUT_SIZE; \ 698 type MPC_RMU_3DLUT_INDEX;\ 905 type MPC_DWB0_MUX;\ 916 type MPC_RMU0_MUX; \ [all …]
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| /drivers/gpu/drm/amd/display/dc/dcn31/ |
| A D | dcn31_vpg.h | 95 type VPG_GENERIC_CONFLICT_CLR;\ 96 type VPG_GENERIC_DATA_INDEX;\ 97 type VPG_GENERIC_DATA_BYTE0;\ 98 type VPG_GENERIC_DATA_BYTE1;\ 99 type VPG_GENERIC_DATA_BYTE2;\ 100 type VPG_GENERIC_DATA_BYTE3;\ 101 type VPG_GENERIC0_FRAME_UPDATE;\ 102 type VPG_GENERIC1_FRAME_UPDATE;\ 103 type VPG_GENERIC2_FRAME_UPDATE;\ 104 type VPG_GENERIC3_FRAME_UPDATE;\ [all …]
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| /drivers/gpu/drm/amd/display/dc/dcn30/ |
| A D | dcn30_vpg.h | 90 type VPG_GENERIC_CONFLICT_CLR;\ 91 type VPG_GENERIC_DATA_INDEX;\ 92 type VPG_GENERIC_DATA_BYTE0;\ 93 type VPG_GENERIC_DATA_BYTE1;\ 94 type VPG_GENERIC_DATA_BYTE2;\ 95 type VPG_GENERIC_DATA_BYTE3;\ 96 type VPG_GENERIC0_FRAME_UPDATE;\ 97 type VPG_GENERIC1_FRAME_UPDATE;\ 98 type VPG_GENERIC2_FRAME_UPDATE;\ 99 type VPG_GENERIC3_FRAME_UPDATE;\ [all …]
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| /drivers/media/pci/cx88/ |
| A D | cx88-cards.c | 97 .type = CX88_RADIO, 133 .type = CX88_RADIO, 188 .type = CX88_RADIO, 217 .type = CX88_RADIO, 249 .type = CX88_RADIO, 286 .type = CX88_RADIO, 318 .type = CX88_RADIO, 362 .type = CX88_RADIO, 384 .type = CX88_RADIO, 473 .type = CX88_RADIO, [all …]
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| /drivers/net/wireless/intel/iwlwifi/mvm/ |
| A D | rs.h | 162 #define is_type_ht_siso(type) ((type) == LQ_HT_SISO) argument 163 #define is_type_ht_mimo2(type) ((type) == LQ_HT_MIMO2) argument 164 #define is_type_vht_siso(type) ((type) == LQ_VHT_SISO) argument 166 #define is_type_he_siso(type) ((type) == LQ_HE_SISO) argument 168 #define is_type_siso(type) (is_type_ht_siso(type) || is_type_vht_siso(type) || \ argument 172 #define is_type_mimo(type) (is_type_mimo2(type)) argument 173 #define is_type_ht(type) (is_type_ht_siso(type) || is_type_ht_mimo2(type)) argument 174 #define is_type_vht(type) (is_type_vht_siso(type) || is_type_vht_mimo2(type)) argument 175 #define is_type_he(type) (is_type_he_siso(type) || is_type_he_mimo2(type)) argument 176 #define is_type_a_band(type) ((type) == LQ_LEGACY_A) argument [all …]
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| /drivers/hwmon/ |
| A D | ibmpowernv.c | 296 for (type = 0; type < ARRAY_SIZE(legacy_compatibles); type++) { in get_sensor_type() 298 return type; in get_sensor_type() 310 for (type = 0; type < MAX_SENSOR_TYPE; type++) in get_sensor_type() 312 return type; in get_sensor_type() 328 sdata_table[i].type == sdata->type) in get_sensor_hwmon_index() 467 for (type = 0; type < MAX_SENSOR_TYPE; type++) { in populate_attr_groups() 475 pgroups[type] = &sensor_groups[type].group; in populate_attr_groups() 518 sdata->type = type; in populate_sensor() 593 sdata[count].type = type; in create_device_attrs() 610 attr_name, type, pgroups[type], sgrp_data, in create_device_attrs() [all …]
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