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Searched refs:umc_max_latency_margin (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/bounding_boxes/
A Ddcn4_soc_bb.h62 .umc_max_latency_margin = 30,
188 .umc_max_latency_margin = 30,
/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/
A Ddml_top_soc_parameter_types.h62 double umc_max_latency_margin; member
/drivers/gpu/drm/amd/display/dc/dml2/
A Ddisplay_mode_core_structs.h374 dml_float_t umc_max_latency_margin; member
/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
A Ddml2_core_dcn4_calcs.c3226 double umc_max_latency_margin, in CalculateTripToMemory() argument
3233 + trip_to_memory_uclk_cycles / uclk_freq_mhz * (1.0 + umc_max_latency_margin / 100.0); in CalculateTripToMemory()
3247 DML_LOG_VERBOSE("DML::%s: umc_max_latency_margin = %f\n", __func__, umc_max_latency_margin); in CalculateTripToMemory()
3265 double umc_max_latency_margin, in CalculateMetaTripToMemory() argument
3271 + meta_trip_to_memory_uclk_cycles / uclk_freq_mhz * (1.0 + umc_max_latency_margin / 100.0); in CalculateMetaTripToMemory()
7247 * (1 + dcn4x->umc_max_latency_margin / 100.0) in get_max_urgent_latency_us()
9064 mode_lib->soc.qos_parameters.qos_params.dcn4x.umc_max_latency_margin, in dml_core_mode_support()
9251 ….uclk_freq_mhz * (1 + mode_lib->soc.qos_parameters.qos_params.dcn4x.umc_max_latency_margin / 100.0) in dml_core_mode_support()
11022 mode_lib->soc.qos_parameters.qos_params.dcn4x.umc_max_latency_margin, in dml_core_mode_programming()
11034 mode_lib->soc.qos_parameters.qos_params.dcn4x.umc_max_latency_margin, in dml_core_mode_programming()

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