Searched refs:umr_mode (Results 1 – 5 of 5) sorted by relevance
106 enum mlx5e_mpwrq_umr_mode umr_mode) in mlx5e_mpwrq_log_wqe_sz() argument151 enum mlx5e_mpwrq_umr_mode umr_mode) in mlx5e_mpwrq_umr_wqe_sz() argument166 enum mlx5e_mpwrq_umr_mode umr_mode) in mlx5e_mpwrq_umr_wqebbs() argument173 enum mlx5e_mpwrq_umr_mode umr_mode) in mlx5e_mpwrq_mtts_per_wqe() argument187 enum mlx5e_mpwrq_umr_mode umr_mode) in mlx5e_mpwrq_max_num_entries() argument193 switch (umr_mode) { in mlx5e_mpwrq_max_num_entries()360 page_shift, umr_mode); in mlx5e_verify_params_rx_mpwqe_strides()386 umr_mode); in mlx5e_rx_mpwqe_is_linear_skb()545 page_shift, umr_mode); in mlx5e_mpwrq_validate_xsk()901 page_shift, umr_mode)) { in mlx5e_build_rq_param()[all …]
63 enum mlx5e_mpwrq_umr_mode umr_mode);65 enum mlx5e_mpwrq_umr_mode umr_mode);67 enum mlx5e_mpwrq_umr_mode umr_mode);69 enum mlx5e_mpwrq_umr_mode umr_mode);71 enum mlx5e_mpwrq_umr_mode umr_mode);73 enum mlx5e_mpwrq_umr_mode umr_mode);75 enum mlx5e_mpwrq_umr_mode umr_mode);
54 if (likely(rq->mpwqe.umr_mode == MLX5E_MPWRQ_UMR_MODE_ALIGNED)) { in mlx5e_xsk_alloc_rx_mpwqe()64 } else if (unlikely(rq->mpwqe.umr_mode == MLX5E_MPWRQ_UMR_MODE_UNALIGNED)) { in mlx5e_xsk_alloc_rx_mpwqe()75 } else if (likely(rq->mpwqe.umr_mode == MLX5E_MPWRQ_UMR_MODE_TRIPLE)) { in mlx5e_xsk_alloc_rx_mpwqe()131 if (likely(rq->mpwqe.umr_mode == MLX5E_MPWRQ_UMR_MODE_ALIGNED)) in mlx5e_xsk_alloc_rx_mpwqe()133 else if (unlikely(rq->mpwqe.umr_mode == MLX5E_MPWRQ_UMR_MODE_OVERSIZED)) in mlx5e_xsk_alloc_rx_mpwqe()135 else if (unlikely(rq->mpwqe.umr_mode == MLX5E_MPWRQ_UMR_MODE_TRIPLE)) in mlx5e_xsk_alloc_rx_mpwqe()
104 enum mlx5e_mpwrq_umr_mode umr_mode) in mlx5e_check_fragmented_striding_rq_cap() argument324 rq->mpwqe.umr_mode), in mlx5e_build_umr_wqe()369 switch (umr_mode) { in mlx5e_mpwrq_access_mode()386 enum mlx5e_mpwrq_umr_mode umr_mode, in mlx5e_create_umr_mkey() argument400 umr_mode == MLX5E_MPWRQ_UMR_MODE_TRIPLE) && in mlx5e_create_umr_mkey()429 if (umr_mode == MLX5E_MPWRQ_UMR_MODE_TRIPLE) in mlx5e_create_umr_mkey()441 switch (umr_mode) { in mlx5e_create_umr_mkey()543 rq->mpwqe.umr_mode, xsk_chunk_size); in mlx5e_create_rq_umr_mkey()931 rq->mpwqe.umr_mode); in mlx5e_alloc_rq()934 rq->mpwqe.umr_mode); in mlx5e_alloc_rq()[all …]
682 u8 umr_mode; member1010 enum mlx5e_mpwrq_umr_mode umr_mode);
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