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Searched refs:update_m_n (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/i915/display/
A Dintel_vblank.c669 new_crtc_state->update_m_n || new_crtc_state->update_lrr); in intel_vblank_evade_init()
697 new_crtc_state->update_m_n || new_crtc_state->update_lrr) in intel_vblank_evade_init()
A Dintel_atomic.c266 crtc_state->update_m_n = false; in intel_crtc_duplicate_state()
A Dintel_display.c999 (new_crtc_state->update_m_n || new_crtc_state->update_lrr || in intel_crtc_vrr_enabling()
1016 (new_crtc_state->update_m_n || new_crtc_state->update_lrr || in intel_crtc_vrr_disabling()
5248 if (!fastset || !pipe_config->update_m_n) in intel_pipe_config_compare()
5355 if (!fastset || !pipe_config->update_m_n) { in intel_pipe_config_compare()
5544 crtc_state->update_m_n = false; in intel_crtc_flag_modeset()
5744 new_crtc_state->update_m_n = false; in intel_crtc_check_fastset()
6605 if (new_crtc_state->update_m_n) in intel_pipe_fastset()
6790 new_crtc_state->update_m_n || new_crtc_state->update_lrr) in intel_update_crtc()
A Dintel_display_types.h1004 bool update_m_n; /* update M/N seamlessly during fastset? */ member
A Dintel_dp.c2987 pipe_config->update_m_n = true; in intel_dp_drrs_compute_config()

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