| /drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
| A D | uoutp.c | 38 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_uoutp_mthd_dp_mst_vcpi() 43 ior->func->dp->vcpi(ior, args->v0.head, args->v0.start_slot, args->v0.num_slots, in nvkm_uoutp_mthd_dp_mst_vcpi() 44 args->v0.pbn, args->v0.aligned_pbn); in nvkm_uoutp_mthd_dp_mst_vcpi() 53 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_uoutp_mthd_dp_mst_id_put() 66 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_uoutp_mthd_dp_mst_id_get() 91 args->v0.watermark, args->v0.hblanksym, args->v0.vblanksym); in nvkm_uoutp_mthd_dp_sst() 104 return outp->func->dp.drive(outp, args->v0.lanes, args->v0.pe, args->v0.vs); in nvkm_uoutp_mthd_dp_drive() 163 args->v0.data, &args->v0.size); in nvkm_uoutp_mthd_dp_aux_xfer() 268 args->v0.max_ac_packet, args->v0.rekey); in nvkm_uoutp_mthd_hdmi() 270 ior->func->hdmi->scdc(ior, args->v0.khz, args->v0.scdc, args->v0.scdc_scrambling, in nvkm_uoutp_mthd_hdmi() [all …]
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| A D | uconn.c | 38 args.v0.version = 0; in nvkm_uconn_uevent_gsp() 39 args.v0.types = 0; in nvkm_uconn_uevent_gsp() 45 args.v0.types |= NVIF_CONN_EVENT_V0_IRQ; in nvkm_uconn_uevent_gsp() 55 args.v0.version = 0; in nvkm_uconn_uevent_aux() 56 args.v0.types = 0; in nvkm_uconn_uevent_aux() 62 args.v0.types |= NVIF_CONN_EVENT_V0_IRQ; in nvkm_uconn_uevent_aux() 72 args.v0.version = 0; in nvkm_uconn_uevent_gpio() 73 args.v0.types = 0; in nvkm_uconn_uevent_gpio() 110 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_uconn_uevent() 177 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_uconn_new() [all …]
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| A D | uhead.c | 50 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_uhead_mthd_scanoutpos() 54 args->v0.vtotal = head->arm.vtotal; in nvkm_uhead_mthd_scanoutpos() 55 args->v0.vblanks = head->arm.vblanks; in nvkm_uhead_mthd_scanoutpos() 56 args->v0.vblanke = head->arm.vblanke; in nvkm_uhead_mthd_scanoutpos() 57 args->v0.htotal = head->arm.htotal; in nvkm_uhead_mthd_scanoutpos() 58 args->v0.hblanks = head->arm.hblanks; in nvkm_uhead_mthd_scanoutpos() 59 args->v0.hblanke = head->arm.hblanke; in nvkm_uhead_mthd_scanoutpos() 65 if (!args->v0.vtotal || !args->v0.htotal) in nvkm_uhead_mthd_scanoutpos() 68 args->v0.time[0] = ktime_to_ns(ktime_get()); in nvkm_uhead_mthd_scanoutpos() 69 head->func->rgpos(head, &args->v0.hline, &args->v0.vline); in nvkm_uhead_mthd_scanoutpos() [all …]
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| A D | udisp.c | 89 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_udisp_new() 101 args->v0.conn_mask = 0; in nvkm_udisp_new() 103 args->v0.conn_mask |= BIT(conn->index); in nvkm_udisp_new() 105 args->v0.outp_mask = 0; in nvkm_udisp_new() 107 args->v0.outp_mask |= BIT(outp->index); in nvkm_udisp_new() 109 args->v0.head_mask = 0; in nvkm_udisp_new() 111 args->v0.head_mask |= BIT(head->id); in nvkm_udisp_new()
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| /drivers/gpu/drm/nouveau/nvkm/engine/device/ |
| A D | ctrl.c | 46 args->v0.version); in nvkm_control_mthd_pstate_info() 57 args->v0.count = 0; in nvkm_control_mthd_pstate_info() 60 args->v0.pwrsrc = -ENODEV; in nvkm_control_mthd_pstate_info() 85 args->v0.version, args->v0.state, args->v0.index); in nvkm_control_mthd_pstate_attr() 124 snprintf(args->v0.name, sizeof(args->v0.name), "%s", domain->mname); in nvkm_control_mthd_pstate_attr() 125 snprintf(args->v0.unit, sizeof(args->v0.unit), "MHz"); in nvkm_control_mthd_pstate_attr() 129 args->v0.index = 0; in nvkm_control_mthd_pstate_attr() 132 args->v0.index = ++j; in nvkm_control_mthd_pstate_attr() 153 args->v0.version, args->v0.ustate, args->v0.pwrsrc); in nvkm_control_mthd_pstate_user() 159 if (args->v0.pwrsrc >= 0) { in nvkm_control_mthd_pstate_user() [all …]
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| A D | user.c | 80 struct nv_device_info_v0 v0; in nvkm_udevice_info() member 155 args->v0.family = 0; in nvkm_udevice_info() 159 args->v0.chipset = device->chipset; in nvkm_udevice_info() 160 args->v0.revision = device->chiprev; in nvkm_udevice_info() 162 args->v0.ram_size = args->v0.ram_user = fb->ram->size; in nvkm_udevice_info() 164 args->v0.ram_size = args->v0.ram_user = 0; in nvkm_udevice_info() 165 if (imem && args->v0.ram_size > 0) in nvkm_udevice_info() 166 args->v0.ram_user = args->v0.ram_user - imem->reserved; in nvkm_udevice_info() 168 snprintf(args->v0.chip, sizeof(args->v0.chip), "%s", device->chip->name); in nvkm_udevice_info() 169 snprintf(args->v0.name, sizeof(args->v0.name), "%s", device->name); in nvkm_udevice_info() [all …]
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| /drivers/gpu/drm/nouveau/nvkm/core/ |
| A D | ioctl.c | 72 args->v0.version, args->v0.count); in nvkm_ioctl_sclass() 73 if (size != args->v0.count * sizeof(args->v0.oclass[0])) in nvkm_ioctl_sclass() 77 if (i < args->v0.count) { in nvkm_ioctl_sclass() 85 args->v0.count = i; in nvkm_ioctl_sclass() 105 args->v0.version, args->v0.handle, args->v0.oclass, in nvkm_ioctl_new() 106 args->v0.object); in nvkm_ioctl_new() 182 args->v0.version, args->v0.method); in nvkm_ioctl_mthd() 289 struct nvif_ioctl_v0 v0; in nvkm_ioctl() member 298 args->v0.version, args->v0.type, args->v0.object, in nvkm_ioctl() 299 args->v0.owner); in nvkm_ioctl() [all …]
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| /drivers/gpu/drm/nouveau/nvkm/subdev/mmu/ |
| A D | ummu.c | 61 struct nvif_mmu_heap_v0 v0; in nvkm_ummu_heap() member 81 struct nvif_mmu_type_v0 v0; in nvkm_ummu_type() member 110 struct nvif_mmu_kind_v0 v0; in nvkm_ummu_kind() member 120 if (argc != args->v0.count * sizeof(*args->v0.data)) in nvkm_ummu_kind() 122 if (args->v0.count > count) in nvkm_ummu_kind() 124 args->v0.kind_inv = kind_inv; in nvkm_ummu_kind() 125 memcpy(args->v0.data, kind, args->v0.count); in nvkm_ummu_kind() 157 struct nvif_mmu_v0 v0; in nvkm_ummu_new() member 169 args->v0.heap_nr = mmu->heap_nr; in nvkm_ummu_new() 170 args->v0.type_nr = mmu->type_nr; in nvkm_ummu_new() [all …]
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| A D | uvmm.c | 56 addr = args->v0.addr; in nvkm_uvmm_mthd_pfnclr() 57 size = args->v0.size; in nvkm_uvmm_mthd_pfnclr() 85 page = args->v0.page; in nvkm_uvmm_mthd_pfnmap() 86 addr = args->v0.addr; in nvkm_uvmm_mthd_pfnmap() 87 size = args->v0.size; in nvkm_uvmm_mthd_pfnmap() 88 phys = args->v0.phys; in nvkm_uvmm_mthd_pfnmap() 118 addr = args->v0.addr; in nvkm_uvmm_mthd_unmap() 164 addr = args->v0.addr; in nvkm_uvmm_mthd_map() 165 size = args->v0.size; in nvkm_uvmm_mthd_map() 243 addr = args->v0.addr; in nvkm_uvmm_mthd_put() [all …]
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| A D | memnv50.c | 40 struct nv50_mem_map_v0 v0; in nv50_mem_map() member 47 if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) { in nv50_mem_map() 48 uvmm.ro = args->v0.ro; in nv50_mem_map() 49 uvmm.kind = args->v0.kind; in nv50_mem_map() 50 uvmm.comp = args->v0.comp; in nv50_mem_map() 71 struct nv50_mem_v0 v0; in nv50_mem_new() member 76 if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) { in nv50_mem_new() 77 type = args->v0.bankswz ? 0x02 : 0x01; in nv50_mem_new() 78 contig = args->v0.contig; in nv50_mem_new()
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| A D | memgf100.c | 40 struct gf100_mem_map_v0 v0; in gf100_mem_map() member 46 if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) { in gf100_mem_map() 47 uvmm.ro = args->v0.ro; in gf100_mem_map() 48 uvmm.kind = args->v0.kind; in gf100_mem_map() 74 struct gf100_mem_v0 v0; in gf100_mem_new() member 79 if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) { in gf100_mem_new() 80 contig = args->v0.contig; in gf100_mem_new()
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| A D | umem.c | 147 struct nvif_mem_v0 v0; in nvkm_umem_new() member 154 if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, true))) { in nvkm_umem_new() 155 type = args->v0.type; in nvkm_umem_new() 156 page = args->v0.page; in nvkm_umem_new() 157 size = args->v0.size; in nvkm_umem_new() 186 args->v0.page = nvkm_memory_page(umem->memory); in nvkm_umem_new() 187 args->v0.addr = nvkm_memory_addr(umem->memory); in nvkm_umem_new() 188 args->v0.size = nvkm_memory_size(umem->memory); in nvkm_umem_new()
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| /drivers/gpu/drm/amd/amdkfd/ |
| A D | cwsr_trap_handler_gfx10.asm | 701 v_mbcnt_hi_u32_b32 v0, -1, v0 702 v_mul_u32_u24 v0, 4, v0 823 v_movrels_b32 v0, v0 //v0 = v[0+m0] 838 v_movrels_b32 v0, v0 //v0 = v[0+m0] 868 v_movrels_b32 v0, v0 //v0 = v[0+m0] 883 v_movrels_b32 v0, v0 //v0 = v[0+m0] 915 v_movrels_b32 v0, v0 927 v_movrels_b32 v0, v0 //v0 = v[0+m0] 1050 v_movreld_b32 v0, v0 //v[0+m0] = v0 1084 v_movreld_b32 v0, v0 //v[0+m0] = v0 [all …]
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| A D | cwsr_trap_handler_gfx12.asm | 329 v_mov_b32 v0, 0x0 568 v_mbcnt_hi_u32_b32 v0, -1, v0 569 v_mul_u32_u24 v0, 4, v0 589 v_add_nc_u32 v0, v0, 128 //mem offset increased by 128 bytes 607 v_add_nc_u32 v0, v0, 256 //mem offset increased by 256 bytes 646 v_movrels_b32 v0, v0 //v0 = v[0+m0] 672 v_movrels_b32 v0, v0 //v0 = v[0+m0] 699 v_movrels_b32 v0, v0 //v0 = v[0+m0] 817 v_movreld_b32 v0, v0 //v[0+m0] = v0 851 v_movreld_b32 v0, v0 //v[0+m0] = v0 [all …]
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| A D | cwsr_trap_handler_gfx8.asm | 352 buffer_store_dword v0, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1 353 buffer_store_dword v1, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1 offset:256 354 buffer_store_dword v2, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1 offset:256*2 445 v_mov_b32 v0, v0 //v0 = v[0+m0] 450 buffer_store_dword v0, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1 451 buffer_store_dword v1, v0, s_save_buf_rsrc0, s_save_mem_offset slc:1 glc:1 offset:256 517 …buffer_load_dword v0, v0, s_restore_buf_rsrc0, s_restore_mem_offset lds:1 // … 518 …buffer_load_dword v0, v0, s_restore_buf_rsrc0, s_restore_mem_offset lds:1 offset:256 // … 547 buffer_load_dword v0, v0, s_restore_buf_rsrc0, s_restore_mem_offset slc:1 glc:1 552 …v_mov_b32 v0, v0 //v[0+m0] … [all …]
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| A D | cwsr_trap_handler_gfx9.asm | 526 write_vgprs_to_mem_with_sqc(v0, 4, s_save_buf_rsrc0, s_save_mem_offset) 587 ds_read_b32 v0, v2 667 v_mov_b32 v0, v0 //v0 = v[0+m0] 780 buffer_load_dword v0, v0, s_restore_buf_rsrc0, s_restore_mem_offset lds:1 // first 64DW 781 …buffer_load_dword v0, v0, s_restore_buf_rsrc0, s_restore_mem_offset lds:1 offset:256 // s… 783 …buffer_load_dword v0, v0, s_restore_buf_rsrc0, s_restore_mem_offset lds:1 offset:512 // third 64… 784 …buffer_load_dword v0, v0, s_restore_buf_rsrc0, s_restore_mem_offset lds:1 offset:768 // forth 64… 785 …buffer_load_dword v0, v0, s_restore_buf_rsrc0, s_restore_mem_offset lds:1 offset:1024 // fifth 6… 813 v_mov_b32 v0, v0 //v[0+m0] = v0 1018 buffer_store_dword v0, v0, s_rsrc, s_mem_offset VMEM_MODIFIERS [all …]
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| /drivers/gpu/drm/nouveau/include/nvif/ |
| A D | if0012.h | 41 } v0; member 80 } v0; member 89 } v0; member 98 } v0; member 116 } v0; member 138 } v0; member 150 } v0; member 157 } v0; member 165 } v0; member 179 } v0; member [all …]
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| /drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
| A D | uchan.c | 50 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_uchan_uevent() 53 switch (args->v0.type) { in nvkm_uchan_uevent() 342 if (argc < sizeof(args->v0) || args->v0.version != 0) in nvkm_uchan_new() 344 argc -= sizeof(args->v0); in nvkm_uchan_new() 354 if (args->v0.vmm) { in nvkm_uchan_new() 360 if (args->v0.ctxdma) { in nvkm_uchan_new() 368 if (args->v0.huserd) { in nvkm_uchan_new() 387 args->v0.priv != 0, args->v0.devm, vmm, ctxdma, args->v0.offset, in nvkm_uchan_new() 388 args->v0.length, userd, args->v0.ouserd, &uchan->chan); in nvkm_uchan_new() 398 args->v0.token = ~0; in nvkm_uchan_new() [all …]
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| A D | ucgrp.c | 90 if (argc < sizeof(args->v0) || args->v0.version != 0) in nvkm_ucgrp_new() 92 argc -= sizeof(args->v0); in nvkm_ucgrp_new() 94 if (args->v0.namelen != argc) in nvkm_ucgrp_new() 98 runl = nvkm_runl_get(fifo, args->v0.runlist, 0); in nvkm_ucgrp_new() 102 vmm = nvkm_uvmm_search(oclass->client, args->v0.vmm); in nvkm_ucgrp_new() 115 ret = nvkm_cgrp_new(runl, args->v0.name, vmm, true, &ucgrp->cgrp); in nvkm_ucgrp_new() 120 args->v0.cgid = ucgrp->cgrp->id; in nvkm_ucgrp_new()
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| /drivers/gpu/drm/nouveau/nvkm/engine/dma/ |
| A D | user.c | 72 struct nv_dma_v0 v0; in nvkm_dmaobj_ctor() member 84 if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, true))) { in nvkm_dmaobj_ctor() 87 args->v0.version, args->v0.target, args->v0.access, in nvkm_dmaobj_ctor() 88 args->v0.start, args->v0.limit); in nvkm_dmaobj_ctor() 89 dmaobj->target = args->v0.target; in nvkm_dmaobj_ctor() 90 dmaobj->access = args->v0.access; in nvkm_dmaobj_ctor() 91 dmaobj->start = args->v0.start; in nvkm_dmaobj_ctor() 92 dmaobj->limit = args->v0.limit; in nvkm_dmaobj_ctor()
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| A D | usernv50.c | 74 struct nv50_dma_v0 v0; in nv50_dmaobj_new() member 94 if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { in nv50_dmaobj_new() 96 "comp %d kind %02x\n", args->v0.version, in nv50_dmaobj_new() 97 args->v0.priv, args->v0.part, args->v0.comp, in nv50_dmaobj_new() 98 args->v0.kind); in nv50_dmaobj_new() 99 user = args->v0.priv; in nv50_dmaobj_new() 100 part = args->v0.part; in nv50_dmaobj_new() 101 comp = args->v0.comp; in nv50_dmaobj_new() 102 kind = args->v0.kind; in nv50_dmaobj_new()
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| A D | usergf119.c | 72 struct gf119_dma_v0 v0; in gf119_dmaobj_new() member 92 if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { in gf119_dmaobj_new() 95 args->v0.version, args->v0.page, args->v0.kind); in gf119_dmaobj_new() 96 kind = args->v0.kind; in gf119_dmaobj_new() 97 page = args->v0.page; in gf119_dmaobj_new()
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| A D | usergv100.c | 71 struct gf119_dma_v0 v0; in gv100_dmaobj_new() member 91 if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { in gv100_dmaobj_new() 94 args->v0.version, args->v0.page, args->v0.kind); in gv100_dmaobj_new() 95 kind = args->v0.kind != 0; in gv100_dmaobj_new() 96 page = args->v0.page != 0; in gv100_dmaobj_new()
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| A D | usergf100.c | 74 struct gf100_dma_v0 v0; in gf100_dmaobj_new() member 94 if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { in gf100_dmaobj_new() 97 args->v0.version, args->v0.priv, args->v0.kind); in gf100_dmaobj_new() 98 kind = args->v0.kind; in gf100_dmaobj_new() 99 user = args->v0.priv; in gf100_dmaobj_new()
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| /drivers/gpu/drm/amd/amdgpu/ |
| A D | df_v4_3.c | 32 uint32_t v0, v1, v28, v31; in df_v4_3_query_ras_poison_mode() local 39 v0 = REG_GET_FIELD(hw_assert_msklo, in df_v4_3_query_ras_poison_mode() 48 if (v0 && v1 && v28 && v31) in df_v4_3_query_ras_poison_mode() 50 else if (!v0 && !v1 && !v28 && !v31) in df_v4_3_query_ras_poison_mode() 54 v0, v1, v28, v31); in df_v4_3_query_ras_poison_mode()
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