| /drivers/gpu/drm/amd/display/dc/dio/dcn401/ |
| A D | dcn401_dio_stream_encoder.c | 466 hw_crtc_timing.v_border_bottom /= 2; in enc401_stream_encoder_dp_set_stream_attribute()
678 hw_crtc_timing.v_addressable - hw_crtc_timing.v_border_bottom - in enc401_stream_encoder_dp_set_stream_attribute()
702 hw_crtc_timing.v_addressable + hw_crtc_timing.v_border_bottom); in enc401_stream_encoder_dp_set_stream_attribute()
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| /drivers/gpu/drm/amd/display/dc/dce120/ |
| A D | dce120_timing_generator.c | 109 timing->v_border_top - timing->v_border_bottom) * in dce120_timing_generator_validate_timing()
434 uint32_t vsync_offset = timing->v_border_bottom + in dce120_timing_generator_program_blanking()
478 timing->v_border_bottom; in dce120_timing_generator_program_blanking()
629 timing->v_border_bottom - timing->v_front_porch; in dce120_timing_generator_enable_advanced_request()
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| /drivers/gpu/drm/amd/display/dc/dce110/ |
| A D | dce110_timing_generator_v.c | 245 uint32_t vsync_offset = timing->v_border_bottom + in dce110_timing_generator_v_program_blanking()
311 timing->v_border_bottom; in dce110_timing_generator_v_program_blanking()
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| A D | dce110_timing_generator.c | 289 uint32_t vsync_offset = dc_crtc_timing->v_border_bottom + in dce110_timing_generator_program_timing_generator()
327 patched_crtc_timing.v_border_bottom; in dce110_timing_generator_program_timing_generator()
604 uint32_t vsync_offset = timing->v_border_bottom + in dce110_timing_generator_program_blanking()
692 timing->v_border_bottom; in dce110_timing_generator_program_blanking()
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| /drivers/gpu/drm/amd/display/dc/optc/dcn201/ |
| A D | dcn201_optc.c | 80 timing->v_border_top - timing->v_border_bottom); in optc201_validate_timing()
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| /drivers/gpu/drm/amd/display/dc/hpo/dcn31/ |
| A D | dcn31_hpo_dp_stream_encoder.c | 357 hw_crtc_timing.v_addressable - hw_crtc_timing.v_border_bottom - in dcn31_hpo_dp_stream_enc_set_stream_attribute()
361 …ight = hw_crtc_timing.v_border_top + hw_crtc_timing.v_addressable + hw_crtc_timing.v_border_bottom; in dcn31_hpo_dp_stream_enc_set_stream_attribute()
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| /drivers/gpu/drm/amd/display/dc/dio/dcn10/ |
| A D | dcn10_stream_encoder.c | 270 hw_crtc_timing.v_border_bottom /= 2; in enc1_stream_encoder_dp_set_stream_attribute()
437 hw_crtc_timing.v_addressable - hw_crtc_timing.v_border_bottom - in enc1_stream_encoder_dp_set_stream_attribute()
461 hw_crtc_timing.v_addressable + hw_crtc_timing.v_border_bottom); in enc1_stream_encoder_dp_set_stream_attribute()
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_stream_encoder.c | 291 hw_crtc_timing.v_border_bottom /= 2; in dce110_stream_encoder_dp_set_stream_attribute()
472 hw_crtc_timing.v_addressable - hw_crtc_timing.v_border_bottom - in dce110_stream_encoder_dp_set_stream_attribute()
499 hw_crtc_timing.v_addressable + hw_crtc_timing.v_border_bottom); in dce110_stream_encoder_dp_set_stream_attribute()
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| /drivers/gpu/drm/amd/display/dc/optc/dcn10/ |
| A D | dcn10_optc.c | 244 patched_crtc_timing.v_border_bottom - in optc1_program_timing()
364 patched_crtc_timing.v_border_bottom - in optc1_set_vtg_params()
602 timing->v_border_top - timing->v_border_bottom); in optc1_validate_timing()
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| /drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| A D | dcn_calcs.c | 423 + pipe->stream->timing.v_border_bottom; in pipe_ctx_to_e2e_pipe_params()
442 - pipe->stream->timing.v_border_bottom in pipe_ctx_to_e2e_pipe_params()
908 pipe->stream->timing.v_border_top + pipe->stream->timing.v_border_bottom; in dcn_validate_bandwidth()
1217 pipe->stream->timing.v_border_bottom + in dcn_validate_bandwidth()
1228 pipe->stream->timing.v_border_bottom) in dcn_validate_bandwidth()
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| /drivers/gpu/drm/amd/display/dc/ |
| A D | dc_spl_translate.c | 134 stream->timing.v_addressable + stream->timing.v_border_bottom + stream->timing.v_border_top; in translate_SPL_in_params_from_pipe_ctx()
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| A D | dc_hw_types.h | 947 uint32_t v_border_bottom; member
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| /drivers/gpu/drm/amd/display/dc/dml2/ |
| A D | dml2_utils.c | 246 vactive = timing->v_addressable + timing->v_border_bottom + timing->v_border_top; in populate_pipe_ctx_dlg_params_from_dml()
251 vblank_end = vblank_start - timing->v_addressable - timing->v_border_top - timing->v_border_bottom; in populate_pipe_ctx_dlg_params_from_dml()
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| A D | dml2_translation_helper.c | 757 …out->VActive[location] = in->timing.v_addressable + in->timing.v_border_bottom + in->timing.v_bord… in populate_dml_timing_cfg_from_stream_state()
775 - in->timing.v_border_bottom; in populate_dml_timing_cfg_from_stream_state()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| A D | dcn314_fpu.c | 300 v_active = timing->v_border_top + timing->v_addressable + timing->v_border_bottom; in get_vertical_back_porch()
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| /drivers/gpu/drm/amd/display/modules/power/ |
| A D | power_helpers.c | 892 stream->timing.v_border_bottom; in mod_power_calc_psr_configs()
959 stream->timing.v_border_top + stream->timing.v_border_bottom; in psr_su_set_dsc_slice_height()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn351/ |
| A D | dcn351_fpu.c | 463 v_active = timing->v_border_top + timing->v_addressable + timing->v_border_bottom; in get_vertical_back_porch()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn35/ |
| A D | dcn35_fpu.c | 430 v_active = timing->v_border_top + timing->v_addressable + timing->v_border_bottom; in get_vertical_back_porch()
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| /drivers/gpu/drm/amd/display/dc/hwss/dcn314/ |
| A D | dcn314_hwseq.c | 104 …ight = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v_border_bottom; in update_dsc_on_stream()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| A D | dcn20_fpu.c | 1131 patched_crtc_timing.v_border_bottom - in dcn20_adjust_freesync_v_startup()
1380 - timing->v_border_top - timing->v_border_bottom) / 2; in dcn20_populate_dml_pipes_from_context()
1398 - timing->v_border_bottom; in dcn20_populate_dml_pipes_from_context()
1404 timing->v_addressable + timing->v_border_top + timing->v_border_bottom; in dcn20_populate_dml_pipes_from_context()
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| /drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
| A D | dml21_translation_helper.c | 430 …timing->v_active = stream->timing.v_addressable + stream->timing.v_border_bottom + stream->timing.… in populate_dml21_timing_config_from_stream_state()
452 - stream->timing.v_border_top - stream->timing.v_border_bottom; in populate_dml21_timing_config_from_stream_state()
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| /drivers/gpu/drm/amd/display/dc/hubp/dcn401/ |
| A D | dcn401_hubp.c | 171 …vblank_end = vblank_start - timing->v_addressable - timing->v_border_top - timing->v_border_bottom; in hubp401_vready_at_or_After_vsync()
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| /drivers/gpu/drm/amd/display/dc/link/ |
| A D | link_dpms.c | 837 …ight = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v_border_bottom; in link_set_dsc_on_stream()
968 …ight = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v_border_bottom; in link_set_dsc_pps_packet()
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| /drivers/gpu/drm/amd/display/dc/dsc/ |
| A D | dc_dsc.c | 1072 pic_height = timing->v_addressable + timing->v_border_top + timing->v_border_bottom; in setup_dsc_config()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| A D | dcn20_resource.c | 1665 + stream->timing.v_border_bottom; in dcn20_validate_dsc()
1868 + timing.v_border_top + timing.v_border_bottom > 0) { in dcn20_validate_apply_pipe_split_flags()
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