| /drivers/clocksource/ |
| A D | acpi_pm.c | 180 u64 value1, value2; in verify_pmtmr_rate() local 186 value2 = clocksource_acpi_pm.read(&clocksource_acpi_pm); in verify_pmtmr_rate() 187 delta = (value2 - value1) & ACPI_PM_MASK; in verify_pmtmr_rate() 210 u64 value1, value2; in init_acpi_pm_clocksource() local 221 value2 = clocksource_acpi_pm.read(&clocksource_acpi_pm); in init_acpi_pm_clocksource() 222 if (value2 == value1) in init_acpi_pm_clocksource() 224 if (value2 > value1) in init_acpi_pm_clocksource() 226 if ((value2 < value1) && ((value2) < 0xFFF)) in init_acpi_pm_clocksource() 229 value1, value2); in init_acpi_pm_clocksource()
|
| /drivers/char/tpm/ |
| A D | tpm-buf.c | 135 __be16 value2 = cpu_to_be16(value); in tpm_buf_append_u16() local 137 tpm_buf_append(buf, (u8 *)&value2, 2); in tpm_buf_append_u16() 143 __be32 value2 = cpu_to_be32(value); in tpm_buf_append_u32() local 145 tpm_buf_append(buf, (u8 *)&value2, 4); in tpm_buf_append_u32()
|
| /drivers/gpu/drm/amd/display/dc/dce60/ |
| A D | dce60_timing_generator.c | 134 uint32_t value2 = dm_read_reg(tg->ctx, addr2); in dce60_timing_generator_enable_advanced_request() local 146 value2, in dce60_timing_generator_enable_advanced_request() 157 value2, in dce60_timing_generator_enable_advanced_request() 176 dm_write_reg(tg->ctx, addr2, value2); in dce60_timing_generator_enable_advanced_request()
|
| /drivers/iio/adc/ |
| A D | cpcap-adc.c | 534 unsigned short value2 = 0; in cpcap_adc_setup_bank() local 542 value2 |= CPCAP_BIT_THERMBIAS_EN; in cpcap_adc_setup_bank() 545 value2); in cpcap_adc_setup_bank() 564 value2 |= ato->adc_ps_factor_in; in cpcap_adc_setup_bank() 565 value2 |= ato->atox_ps_factor_in; in cpcap_adc_setup_bank() 570 value2 |= ato->adc_ps_factor_out; in cpcap_adc_setup_bank() 571 value2 |= ato->atox_ps_factor_out; in cpcap_adc_setup_bank() 595 value2); in cpcap_adc_setup_bank()
|
| A D | ti-ads131e08.c | 501 int *value2, long mask) in ads131e08_read_raw() argument 530 *value2 = ADS131E08_NUM_DATA_BITS(st->data_rate) - 1; in ads131e08_read_raw() 546 int value2, long mask) in ads131e08_write_raw() argument
|
| /drivers/iio/pressure/ |
| A D | dlhl60d.c | 136 int *value2, long mask) in dlh_read_raw() argument 173 *value2 = rem; in dlh_read_raw() 178 *value2 = DLH_NUM_TEMP_BITS; in dlh_read_raw() 188 *value2 = 100 * st->info->osdig * 100000; in dlh_read_raw()
|
| /drivers/gpu/drm/amd/display/dc/dcn201/ |
| A D | dcn201_link_encoder.c | 55 uint32_t value1, value2; in dcn201_link_encoder_get_max_link_cap() local 60 RDPCS_PHY_DPALT_DP4, &value2); in dcn201_link_encoder_get_max_link_cap() 63 if (!value1 && !value2 && link_settings->lane_count > LANE_COUNT_TWO) in dcn201_link_encoder_get_max_link_cap()
|
| /drivers/cdx/controller/ |
| A D | bitfield.h | 56 field2, value2, \ argument 63 CDX_INSERT_FIELD(field2, (value2)) | \
|
| /drivers/net/wireless/ath/ath9k/ |
| A D | ar9003_phy.c | 1073 s32 value, value2; in ar9003_hw_ani_control() local 1192 value2 = firstep_table[level] - in ar9003_hw_ani_control() 1195 if (value2 < ATH9K_SIG_FIRSTEP_SETTING_MIN) in ar9003_hw_ani_control() 1196 value2 = ATH9K_SIG_FIRSTEP_SETTING_MIN; in ar9003_hw_ani_control() 1198 value2 = ATH9K_SIG_FIRSTEP_SETTING_MAX; in ar9003_hw_ani_control() 1218 value2, in ar9003_hw_ani_control() 1257 value2 = cycpwrThr1_table[level] - in ar9003_hw_ani_control() 1261 value2 = ATH9K_SIG_SPUR_IMM_SETTING_MIN; in ar9003_hw_ani_control() 1263 value2 = ATH9K_SIG_SPUR_IMM_SETTING_MAX; in ar9003_hw_ani_control() 1265 AR_PHY_EXT_CYCPWR_THR1, value2); in ar9003_hw_ani_control() [all …]
|
| /drivers/media/usb/gspca/ |
| A D | sn9c20x.c | 1368 u16 value2; in set_hvflip() local 1405 i2c_r2(gspca_dev, 0x20, &value2); in set_hvflip() 1406 value2 &= ~0xc0a0; in set_hvflip() 1408 value2 |= 0x8080; in set_hvflip() 1410 value2 |= 0x4020; in set_hvflip() 1411 i2c_w2(gspca_dev, 0x20, value2); in set_hvflip() 1416 i2c_r2(gspca_dev, 0x20, &value2); in set_hvflip() 1417 value2 &= ~0x0003; in set_hvflip() 1419 value2 |= 0x0002; in set_hvflip() 1421 value2 |= 0x0001; in set_hvflip() [all …]
|
| /drivers/pinctrl/intel/ |
| A D | pinctrl-intel.c | 705 u32 value2; in intel_config_get_debounce() local 712 value2 = readl(padcfg2); in intel_config_get_debounce() 714 if (!(value2 & PADCFG2_DEBEN)) in intel_config_get_debounce() 717 v = (value2 & PADCFG2_DEBOUNCE_MASK) >> PADCFG2_DEBOUNCE_SHIFT; in intel_config_get_debounce() 865 u32 value0, value2; in intel_config_set_debounce() local 885 value2 = readl(padcfg2); in intel_config_set_debounce() 887 value2 = (value2 & ~PADCFG2_DEBOUNCE_MASK) | (v << PADCFG2_DEBOUNCE_SHIFT); in intel_config_set_debounce() 891 value2 |= PADCFG2_DEBEN; in intel_config_set_debounce() 895 value2 &= ~PADCFG2_DEBEN; in intel_config_set_debounce() 899 writel(value2, padcfg2); in intel_config_set_debounce()
|
| /drivers/ata/ |
| A D | pata_pdc2027x.c | 73 u8 value0, value1, value2; member 91 u8 value0, value1, value2; member 308 ctcr1 |= (pdc2027x_pio_timing_tbl[pio].value2 << 24); in pdc2027x_set_piomode() 350 (pdc2027x_udma_timing_tbl[udma_mode].value2 << 16); in pdc2027x_set_dmamode()
|
| A D | pata_macio.c | 459 unsigned int value, value2 = 0; in pata_macio_default_timings() local 464 value2 = 0x00033031; in pata_macio_default_timings() 469 value2 = 0x00002921; in pata_macio_default_timings() 484 priv->treg[0][1] = priv->treg[1][1] = value2; in pata_macio_default_timings()
|
| /drivers/media/platform/qcom/camss/ |
| A D | camss-ispif.c | 165 u32 value0, value1, value2, value3, value4, value5; in ispif_isr_8x96() local 169 value2 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_2(0)); in ispif_isr_8x96() 176 writel_relaxed(value2, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_2(0)); in ispif_isr_8x96() 201 if (unlikely(value2 & ISPIF_VFE_m_IRQ_STATUS_2_RDI2_OVERFLOW)) in ispif_isr_8x96() 233 u32 value0, value1, value2; in ispif_isr_8x16() local 237 value2 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_2(0)); in ispif_isr_8x16() 241 writel_relaxed(value2, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_2(0)); in ispif_isr_8x16() 260 if (unlikely(value2 & ISPIF_VFE_m_IRQ_STATUS_2_RDI2_OVERFLOW)) in ispif_isr_8x16()
|
| /drivers/acpi/x86/ |
| A D | lpss.c | 921 u32 value2 = LPSS_PMCSR_D3hot; in lpss_iosf_enter_d3_state() local 951 LPSS_IOSF_PMCSR, value2, mask2); in lpss_iosf_enter_d3_state() 954 LPSS_IOSF_PMCSR, value2, mask2); in lpss_iosf_enter_d3_state() 970 u32 value2 = LPSS_PMCSR_D0; in lpss_iosf_exit_d3_state() local 984 LPSS_IOSF_PMCSR, value2, mask2); in lpss_iosf_exit_d3_state() 987 LPSS_IOSF_PMCSR, value2, mask2); in lpss_iosf_exit_d3_state()
|
| /drivers/media/platform/nvidia/tegra-vde/ |
| A D | h264.c | 159 u32 value2 = frame ? ((frame->chroma_atoms_pitch << 6) | 1) : 0; in tegra_vde_setup_frameid() local 165 tegra_vde_writel(vde, value2, vde->frameid, 0x280 + frameid * 4); in tegra_vde_setup_frameid() 186 u32 value1, u32 value2) in tegra_vde_setup_iram_entry() argument 190 trace_vde_setup_iram_entry(table, row, value1, value2); in tegra_vde_setup_iram_entry() 193 iram_tables[0x20 * table + row * 2 + 1] = value2; in tegra_vde_setup_iram_entry()
|
| /drivers/acpi/ |
| A D | acpi_processor.c | 52 u8 value2 = 0; in acpi_processor_errata_piix4() local 132 pci_read_config_byte(dev, 0x77, &value2); in acpi_processor_errata_piix4() 133 if ((value1 & 0x80) || (value2 & 0x80)) in acpi_processor_errata_piix4()
|
| /drivers/firmware/ |
| A D | stratix10-rsu.c | 231 unsigned long long *value2 = (unsigned long long *)data->kaddr2; in rsu_dcmf_version_callback() local 236 priv->dcmf_version.dcmf2 = FIELD_GET(RSU_DCMF2_MASK, *value2); in rsu_dcmf_version_callback() 237 priv->dcmf_version.dcmf3 = FIELD_GET(RSU_DCMF3_MASK, *value2); in rsu_dcmf_version_callback()
|
| /drivers/md/persistent-data/ |
| A D | dm-btree.h | 76 int (*equal)(void *context, const void *value1, const void *value2);
|
| /drivers/video/fbdev/ |
| A D | ffb.c | 334 u32 value2; member 448 upa_writel(0, &dac->value2); in ffb_switch_from_graph() 451 FFB_DAC_CUR_CTRL_P1), &dac->value2); in ffb_switch_from_graph()
|
| /drivers/clk/xilinx/ |
| A D | clk-xlnx-clock-wizard.c | 440 u32 regh, edged, p5en, p5fedge, value2, m, regval, regval1, value; in clk_wzrd_dynamic_ver_all_nolock() local 468 value2 = divider->d; in clk_wzrd_dynamic_ver_all_nolock() 469 edged = value2 % WZRD_DUTY_CYCLE; in clk_wzrd_dynamic_ver_all_nolock() 470 regh = (value2 / WZRD_DUTY_CYCLE); in clk_wzrd_dynamic_ver_all_nolock()
|
| /drivers/gpu/drm/amd/display/dc/dio/dcn10/ |
| A D | dcn10_link_encoder.c | 1229 uint32_t value2 = 0; in dcn10_link_encoder_update_mst_stream_allocation_table() local 1335 DP_MSE_16_MTP_KEEPOUT, &value2); in dcn10_link_encoder_update_mst_stream_allocation_table() 1338 if (!value1 && !value2) in dcn10_link_encoder_update_mst_stream_allocation_table()
|
| /drivers/net/ethernet/sfc/falcon/ |
| A D | bitfield.h | 277 field2, value2, \ argument 287 EF4_INSERT_FIELD_NATIVE((min), (max), field2, (value2)) | \
|
| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_link_encoder.c | 1506 uint32_t value2 = 0; in dce110_link_encoder_update_mst_stream_allocation_table() local 1611 DP_MSE_16_MTP_KEEPOUT, &value2); in dce110_link_encoder_update_mst_stream_allocation_table() 1614 if (!value1 && !value2) in dce110_link_encoder_update_mst_stream_allocation_table()
|
| /drivers/net/ethernet/sfc/ |
| A D | bitfield.h | 279 field2, value2, \ argument 298 EFX_INSERT_FIELD_NATIVE((min), (max), field2, (value2)) | \
|