| /drivers/gpu/drm/msm/registers/ |
| A D | gen_header.py | 76 def ctype(self, var_name): argument
79 val = var_name
82 val = var_name
85 val = var_name
88 val = var_name
91 val = "((int32_t)(%s * %d.0))" % (var_name, 1 << self.radix)
94 val = "((uint32_t)(%s * %d.0))" % (var_name, 1 << self.radix)
97 val = "fui(%s)" % var_name
100 val = "_mesa_float_to_half(%s)" % var_name
103 val = var_name
[all …]
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| /drivers/net/wireless/intel/iwlwifi/fw/ |
| A D | uefi.c | 86 char *var_name, in iwl_uefi_get_verified_variable_guid() argument
97 "%s UEFI variable not found 0x%lx\n", var_name, in iwl_uefi_get_verified_variable_guid()
105 var_name, var_size); in iwl_uefi_get_verified_variable_guid()
110 IWL_DEBUG_RADIO(trans, "%s from UEFI with size %lu\n", var_name, in iwl_uefi_get_verified_variable_guid()
121 char *var_name, in iwl_uefi_get_verified_variable() argument
126 uefi_var_name, var_name, in iwl_uefi_get_verified_variable()
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| /drivers/gpu/drm/amd/display/dc/resource/dcn201/ |
| A D | dcn201_resource.c | 259 #define SRIR(var_name, reg_name, block, id)\ argument
260 .var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
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| /drivers/gpu/drm/amd/display/dc/resource/dcn21/ |
| A D | dcn21_resource.c | 109 #define SRIR(var_name, reg_name, block, id)\ argument
110 .var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
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| /drivers/gpu/drm/amd/display/dc/resource/dcn301/ |
| A D | dcn301_resource.c | 128 #define SRIR(var_name, reg_name, block, id)\ argument
129 .var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| A D | dcn316_resource.c | 160 #define SRIR(var_name, reg_name, block, id)\ argument
161 .var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn314/ |
| A D | dcn314_resource.c | 157 #define SRIR(var_name, reg_name, block, id)\ argument
158 .var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| A D | dcn31_resource.c | 140 #define SRIR(var_name, reg_name, block, id)\ argument
141 .var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| A D | dcn321_resource.c | 152 #define SRIR(var_name, reg_name, block, id)\ argument
153 .var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| A D | dcn35_resource.c | 168 #define SRIR(var_name, reg_name, block, id)\ argument
169 .var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| A D | dcn315_resource.c | 174 #define SRIR(var_name, reg_name, block, id)\ argument
175 .var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| A D | dcn351_resource.c | 148 #define SRIR(var_name, reg_name, block, id)\ argument
149 .var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn36/ |
| A D | dcn36_resource.c | 153 #define SRIR(var_name, reg_name, block, id)\ argument
154 .var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| A D | dcn30_resource.c | 129 #define SRIR(var_name, reg_name, block, id)\ argument
130 .var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| A D | dcn401_resource.c | 139 #define SRIR(var_name, reg_name, block, id)\ argument
140 .var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| A D | dcn20_resource.c | 145 #define SRIR(var_name, reg_name, block, id)\ argument
146 .var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
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| /drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| A D | dcn32_resource.c | 152 #define SRIR(var_name, reg_name, block, id)\ argument
153 .var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
|