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Searched refs:vbif (Results 1 – 25 of 36) sorted by relevance

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/drivers/gpu/drm/msm/disp/dpu1/
A Ddpu_vbif.c46 if (!vbif || !vbif->cap || !vbif->ops.get_halt_ctrl) { in _dpu_vbif_wait_for_xin_halt()
53 status = vbif->ops.get_halt_ctrl(vbif, xin_id); in _dpu_vbif_wait_for_xin_halt()
57 status = vbif->ops.get_halt_ctrl(vbif, xin_id); in _dpu_vbif_wait_for_xin_halt()
128 if (!vbif || !vbif->cap) { in _dpu_vbif_get_ot_limit()
148 if (vbif && vbif->ops.get_limit_conf) { in _dpu_vbif_get_ot_limit()
149 val = vbif->ops.get_limit_conf(vbif, in _dpu_vbif_get_ot_limit()
226 if (!vbif || !vbif->cap) { in dpu_vbif_set_qos_remap()
264 if (vbif && vbif->ops.clear_errors) { in dpu_vbif_clear_errors()
265 vbif->ops.clear_errors(vbif, &pnd, &src); in dpu_vbif_clear_errors()
285 if (vbif && vbif->cap && vbif->ops.set_mem_type) { in dpu_vbif_init_memtypes()
[all …]
A Ddpu_hw_vbif.c35 #define VBIF_XINL_QOS_LVL_REMAP_000(vbif) (VBIF_XINL_QOS_RP_REMAP_000 + (vbif)->cap->qos_rp_remap_s… argument
43 if (!vbif) in dpu_hw_clear_errors()
45 c = &vbif->hw; in dpu_hw_clear_errors()
72 c = &vbif->hw; in dpu_hw_set_mem_type()
90 struct dpu_hw_blk_reg_map *c = &vbif->hw; in dpu_hw_set_limit_conf()
111 struct dpu_hw_blk_reg_map *c = &vbif->hw; in dpu_hw_get_limit_conf()
133 struct dpu_hw_blk_reg_map *c = &vbif->hw; in dpu_hw_set_halt_ctrl()
163 if (!vbif) in dpu_hw_set_qos_remap()
166 c = &vbif->hw; in dpu_hw_set_qos_remap()
192 if (!vbif || xin_id >= MAX_XIN_COUNT) in dpu_hw_set_write_gather_en()
[all …]
A Ddpu_hw_vbif.h26 void (*set_limit_conf)(struct dpu_hw_vbif *vbif,
36 u32 (*get_limit_conf)(struct dpu_hw_vbif *vbif,
45 void (*set_halt_ctrl)(struct dpu_hw_vbif *vbif,
54 bool (*get_halt_ctrl)(struct dpu_hw_vbif *vbif,
64 void (*set_qos_remap)(struct dpu_hw_vbif *vbif,
73 void (*set_mem_type)(struct dpu_hw_vbif *vbif,
85 void (*clear_errors)(struct dpu_hw_vbif *vbif,
93 void (*set_write_gather_en)(struct dpu_hw_vbif *vbif, u32 xin_id);
A Ddpu_kms.c1063 const struct dpu_vbif_cfg *vbif = &dpu_kms->catalog->vbif[i]; in dpu_kms_mdp_snapshot() local
1066 dpu_kms->vbif[vbif->id] + vbif->base, in dpu_kms_mdp_snapshot()
1067 "%s", vbif->name); in dpu_kms_mdp_snapshot()
1224 const struct dpu_vbif_cfg *vbif = &dpu_kms->catalog->vbif[i]; in dpu_kms_hw_init() local
1226 hw = dpu_hw_vbif_init(dev, vbif, dpu_kms->vbif[vbif->id]); in dpu_kms_hw_init()
1233 dpu_kms->hw_vbif[vbif->id] = hw; in dpu_kms_hw_init()
1353 if (IS_ERR(dpu_kms->vbif[VBIF_RT])) { in dpu_kms_mmap_mdp5()
1356 dpu_kms->vbif[VBIF_RT] = NULL; in dpu_kms_mmap_mdp5()
1364 dpu_kms->vbif[VBIF_NRT] = NULL; in dpu_kms_mmap_mdp5()
1389 dpu_kms->vbif[VBIF_RT] = NULL; in dpu_kms_mmap_dpu()
[all …]
A Ddpu_kms.h66 void __iomem *mmio, *vbif[VBIF_MAX]; member
A Ddpu_hw_catalog.h730 const struct dpu_vbif_cfg *vbif; member
/drivers/gpu/drm/msm/disp/dpu1/catalog/
A Ddpu_6_5_qcm2290.h141 .vbif = sdm845_vbif,
A Ddpu_6_3_sm6115.h148 .vbif = sdm845_vbif,
A Ddpu_6_9_sm6375.h159 .vbif = sdm845_vbif,
A Ddpu_4_1_sdm670.h148 .vbif = sdm845_vbif,
A Ddpu_1_15_msm8917.h180 .vbif = msm8996_vbif,
A Ddpu_1_14_msm8937.h201 .vbif = msm8996_vbif,
A Ddpu_1_16_msm8953.h208 .vbif = msm8996_vbif,
A Ddpu_5_4_sm6125.h221 .vbif = sdm845_vbif,
A Ddpu_6_2_sc7180.h215 .vbif = sdm845_vbif,
A Ddpu_3_3_sdm630.h216 .vbif = msm8998_vbif,
A Ddpu_6_4_sm6350.h233 .vbif = sdm845_vbif,
A Ddpu_5_3_sm6150.h250 .vbif = sdm845_vbif,
A Ddpu_7_2_sc7280.h257 .vbif = sdm845_vbif,
A Ddpu_3_2_sdm660.h278 .vbif = msm8998_vbif,
A Ddpu_1_7_msm8996.h324 .vbif = msm8996_vbif,
A Ddpu_3_0_msm8998.h314 .vbif = msm8998_vbif,
A Ddpu_5_2_sm7150.h313 .vbif = sdm845_vbif,
A Ddpu_4_0_sdm845.h329 .vbif = sdm845_vbif,
A Ddpu_5_0_sm8150.h385 .vbif = sdm845_vbif,

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