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Searched refs:vc4_state (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/vc4/
A Dvc4_plane.c293 memset(&vc4_state->lbm, 0, sizeof(vc4_state->lbm)); in vc4_plane_duplicate_state()
305 vc4_state->dlist = kmemdup(vc4_state->dlist, in vc4_plane_duplicate_state()
312 vc4_state->dlist_size = vc4_state->dlist_count; in vc4_plane_duplicate_state()
917 vc4_state->hvs_load += vc4_state->crtc_h * vc4_state->crtc_w; in vc4_plane_calc_load()
974 vc4_state->dlist[vc4_state->lbm_offset] = vc4_state->lbm.start; in vc4_plane_allocate_lbm()
1046 vc4_state->dlist[vc4_state->ptr0_offset[i]] |= in vc6_plane_allocate_upm()
1237 !vc4_state->crtc_w || !vc4_state->crtc_h) { in vc4_plane_mode_set()
2158 !vc4_state->crtc_w || !vc4_state->crtc_h) in vc4_plane_atomic_check()
2319 vc4_state->dlist[vc4_state->pos0_offset] = in vc4_plane_atomic_async_update()
2321 vc4_state->dlist[vc4_state->pos2_offset] = in vc4_plane_atomic_async_update()
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A Dvc4_crtc.c720 *left = vc4_state->margins.left; in vc4_crtc_get_margins()
721 *right = vc4_state->margins.right; in vc4_crtc_get_margins()
722 *top = vc4_state->margins.top; in vc4_crtc_get_margins()
723 *bottom = vc4_state->margins.bottom; in vc4_crtc_get_margins()
766 vc4_state->hvs_load = mode->clock * 1000; in vc4_crtc_atomic_check()
776 sizeof(vc4_state->margins))) { in vc4_crtc_atomic_check()
778 sizeof(vc4_state->margins)); in vc4_crtc_atomic_check()
1108 vc4_state = kzalloc(sizeof(*vc4_state), GFP_KERNEL); in vc4_crtc_duplicate_state()
1109 if (!vc4_state) in vc4_crtc_duplicate_state()
1117 return &vc4_state->base; in vc4_crtc_duplicate_state()
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A Dvc4_hvs.c443 (vc4_state->assigned_channel * 3 * crtc->gamma_size)); in vc4_hvs_lut_load()
846 HVS_WRITE(SCALER6_DISPX_LPTRS(vc4_state->assigned_channel), in vc4_hvs_install_dlist()
847 VC4_SET_FIELD(vc4_state->mm.start, in vc4_hvs_install_dlist()
850 HVS_WRITE(SCALER_DISPLISTX(vc4_state->assigned_channel), in vc4_hvs_install_dlist()
851 vc4_state->mm.start); in vc4_hvs_install_dlist()
870 if (!vc4_crtc->feeds_txp || vc4_state->txp_armed) { in vc4_hvs_update_dlist()
879 vc4_crtc->current_dlist = vc4_state->mm.start; in vc4_hvs_update_dlist()
891 vc4_crtc->current_hvs_channel = vc4_state->assigned_channel; in vc4_hvs_atomic_begin()
920 unsigned int chan = vc4_state->assigned_channel; in vc4_hvs_atomic_disable()
935 unsigned int channel = vc4_state->assigned_channel; in vc4_hvs_atomic_flush()
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A Dvc4_kms.c222 struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc_state); in vc4_hvs_pv_muxing_commit() local
229 if (vc4_state->assigned_channel != 2) in vc4_hvs_pv_muxing_commit()
266 struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc_state); in vc5_hvs_pv_muxing_commit() local
268 unsigned int channel = vc4_state->assigned_channel; in vc5_hvs_pv_muxing_commit()
270 if (!vc4_state->update_muxing) in vc5_hvs_pv_muxing_commit()
340 struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc_state); in vc6_hvs_pv_muxing_commit() local
346 if (!vc4_state->update_muxing) in vc6_hvs_pv_muxing_commit()
349 if (vc4_state->assigned_channel != 1) in vc6_hvs_pv_muxing_commit()
A Dvc4_txp.c242 struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state); in vc4_txp_armed() local
244 vc4_state->txp_armed = true; in vc4_txp_armed()

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