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Searched refs:viafb_write_reg_mask (Results 1 – 6 of 6) sorted by relevance

/drivers/video/fbdev/via/
A Dlcd.c519 viafb_write_reg_mask(CR99, VIACR, 0x08, in lcd_patch_skew()
606 viafb_write_reg_mask(CRD4, VIACR, 0, BIT1); in integrated_lvds_disable()
615 viafb_write_reg_mask(CR6A, VIACR, 0, BIT3); in integrated_lvds_disable()
659 viafb_write_reg_mask(CR91, VIACR, 0, BIT0); in integrated_lvds_enable()
668 viafb_write_reg_mask(CRD3, VIACR, 0, BIT0); in integrated_lvds_enable()
680 viafb_write_reg_mask(CRD2, VIACR, 0, BIT7); in integrated_lvds_enable()
686 viafb_write_reg_mask(CRD2, VIACR, 0, BIT6); in integrated_lvds_enable()
731 viafb_write_reg_mask(CR79, VIACR, 0x00, 0x01); in viafb_lcd_disable()
733 viafb_write_reg_mask(CR6B, VIACR, 0x00, 0x08); in viafb_lcd_disable()
743 viafb_write_reg_mask(CR97, VIACR, 0x84, in set_lcd_output_path()
[all …]
A Ddvi.c61 viafb_write_reg_mask(SR1E, VIASR, 0xF0, BIT4 + in viafb_tmds_trasmitter_identify()
66 viafb_write_reg_mask(SR3E, VIASR, 0x0, BIT5); in viafb_tmds_trasmitter_identify()
325 viafb_write_reg_mask(SR1B, VIASR, 0, BIT1); in dvi_patch_skew_dvp0()
326 viafb_write_reg_mask(SR2A, VIASR, 0, BIT4); in dvi_patch_skew_dvp0()
334 viafb_write_reg_mask(CR96, VIACR, 0x03, in dvi_patch_skew_dvp0()
337 viafb_write_reg_mask(CR96, VIACR, 0x07, in dvi_patch_skew_dvp0()
344 viafb_write_reg_mask(CR96, VIACR, 0x07, in dvi_patch_skew_dvp0()
369 viafb_write_reg_mask(CR99, VIACR, 0x08, in dvi_patch_skew_dvp_low()
376 viafb_write_reg_mask(CR99, VIACR, 0x0F, in dvi_patch_skew_dvp_low()
453 viafb_write_reg_mask(CR91, VIACR, 0, BIT7); in viafb_dvi_enable()
[all …]
A Dhw.c2053 viafb_write_reg_mask(CR96, VIACR, in viafb_set_dpa_gfx()
2057 viafb_write_reg_mask(SR1E, VIASR, in viafb_set_dpa_gfx()
2059 viafb_write_reg_mask(SR2A, VIASR, in viafb_set_dpa_gfx()
2062 viafb_write_reg_mask(SR1B, VIASR, in viafb_set_dpa_gfx()
2064 viafb_write_reg_mask(SR2A, VIASR, in viafb_set_dpa_gfx()
2072 viafb_write_reg_mask(CR9B, VIACR, in viafb_set_dpa_gfx()
2076 viafb_write_reg_mask(SR65, VIASR, in viafb_set_dpa_gfx()
2083 viafb_write_reg_mask(CR97, VIACR, in viafb_set_dpa_gfx()
2090 viafb_write_reg_mask(CR99, VIACR, in viafb_set_dpa_gfx()
2097 viafb_write_reg_mask(CR97, VIACR, in viafb_set_dpa_gfx()
[all …]
A Dvia_utility.c138 viafb_write_reg_mask(SR16, VIASR, 0x80, BIT7); in viafb_set_gamma_table()
148 viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7); in viafb_set_gamma_table()
152 viafb_write_reg_mask(SR1A, VIASR, 0x0, BIT0); in viafb_set_gamma_table()
169 viafb_write_reg_mask(SR1A, VIASR, 0x01, BIT0); in viafb_set_gamma_table()
170 viafb_write_reg_mask(CR6A, VIACR, 0x02, BIT1); in viafb_set_gamma_table()
193 viafb_write_reg_mask(SR16, VIASR, 0x80, BIT7); in viafb_get_gamma_table()
203 viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7); in viafb_get_gamma_table()
207 viafb_write_reg_mask(SR1A, VIASR, 0x0, BIT0); in viafb_get_gamma_table()
A Dviafbdev.c1151 viafb_write_reg_mask(CR96, VIACR, in viafb_dvp0_proc_write()
1155 viafb_write_reg_mask(SR2A, VIASR, in viafb_dvp0_proc_write()
1157 viafb_write_reg_mask(SR1B, VIASR, in viafb_dvp0_proc_write()
1161 viafb_write_reg_mask(SR2A, VIASR, in viafb_dvp0_proc_write()
1163 viafb_write_reg_mask(SR1E, VIASR, in viafb_dvp0_proc_write()
1219 viafb_write_reg_mask(CR9B, VIACR, in viafb_dvp1_proc_write()
1223 viafb_write_reg_mask(SR65, VIASR, in viafb_dvp1_proc_write()
1227 viafb_write_reg_mask(SR65, VIASR, in viafb_dvp1_proc_write()
1270 viafb_write_reg_mask(CR97, VIACR, reg_val, 0x0f); in viafb_dfph_proc_write()
1304 viafb_write_reg_mask(CR99, VIACR, reg_val, 0x0f); in viafb_dfpl_proc_write()
A Dhw.h19 #define viafb_write_reg_mask(i, p, d, m) via_write_reg_mask(p, i, d, m) macro

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