| /drivers/gpu/drm/amd/amdgpu/ |
| A D | vcn_v4_0_5.c | 346 vinst->set_pg_state(vinst, AMD_PG_STATE_GATE); in vcn_v4_0_5_hw_fini() 412 int inst = vinst->inst; in vcn_v4_0_5_mc_resume() 475 int inst_idx = vinst->inst; in vcn_v4_0_5_mc_resume_dpg_mode() 589 int inst = vinst->inst; in vcn_v4_0_5_disable_static_power_gating() 649 int inst = vinst->inst; in vcn_v4_0_5_enable_static_power_gating() 692 int inst = vinst->inst; in vcn_v4_0_5_disable_clock_gating() 808 int inst_idx = vinst->inst; in vcn_v4_0_5_disable_clock_gating_dpg_mode() 863 int inst = vinst->inst; in vcn_v4_0_5_enable_clock_gating() 1056 int i = vinst->inst; in vcn_v4_0_5_start() 1275 int i = vinst->inst; in vcn_v4_0_5_stop() [all …]
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| A D | vcn_v5_0_0.c | 313 vinst->set_pg_state(vinst, AMD_PG_STATE_GATE); in vcn_v5_0_0_hw_fini() 379 int inst = vinst->inst; in vcn_v5_0_0_mc_resume() 442 int inst_idx = vinst->inst; in vcn_v5_0_0_mc_resume_dpg_mode() 553 int inst = vinst->inst; in vcn_v5_0_0_disable_static_power_gating() 621 int inst = vinst->inst; in vcn_v5_0_0_enable_static_power_gating() 712 int inst_idx = vinst->inst; in vcn_v5_0_0_start_dpg_mode() 816 int i = vinst->inst; in vcn_v5_0_0_start() 973 int inst_idx = vinst->inst; in vcn_v5_0_0_stop_dpg_mode() 1009 int i = vinst->inst; in vcn_v5_0_0_stop() 1101 int inst_idx = vinst->inst; in vcn_v5_0_0_pause_dpg_mode() [all …]
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| A D | vcn_v4_0.c | 394 vinst->set_pg_state(vinst, AMD_PG_STATE_GATE); in vcn_v4_0_hw_fini() 462 int inst = vinst->inst; in vcn_v4_0_mc_resume() 525 int inst_idx = vinst->inst; in vcn_v4_0_mc_resume_dpg_mode() 633 int inst = vinst->inst; in vcn_v4_0_disable_static_power_gating() 699 int inst = vinst->inst; in vcn_v4_0_enable_static_power_gating() 755 int inst = vinst->inst; in vcn_v4_0_disable_clock_gating() 926 int inst = vinst->inst; in vcn_v4_0_enable_clock_gating() 1145 int i = vinst->inst; in vcn_v4_0_start() 1223 vcn_v4_0_mc_resume(vinst); in vcn_v4_0_start() 1614 int i = vinst->inst; in vcn_v4_0_stop() [all …]
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| A D | vcn_v5_0_1.c | 284 vinst->set_pg_state(vinst, AMD_PG_STATE_GATE); in vcn_v5_0_1_hw_fini() 356 int inst = vinst->inst; in vcn_v5_0_1_mc_resume() 421 int inst_idx = vinst->inst; in vcn_v5_0_1_mc_resume_dpg_mode() 603 int inst_idx = vinst->inst; in vcn_v5_0_1_start_dpg_mode() 909 int i = vinst->inst; in vcn_v5_0_1_start() 951 vcn_v5_0_1_mc_resume(vinst); in vcn_v5_0_1_start() 1063 int inst_idx = vinst->inst; in vcn_v5_0_1_stop_dpg_mode() 1101 int i = vinst->inst; in vcn_v5_0_1_stop() 1366 if (state == vinst->cur_state) in vcn_v5_0_1_set_pg_state() 1370 ret = vcn_v5_0_1_stop(vinst); in vcn_v5_0_1_set_pg_state() [all …]
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| A D | vcn_v3_0.c | 467 vinst->set_pg_state(vinst, AMD_PG_STATE_GATE); in vcn_v3_0_hw_fini() 533 int inst = vinst->inst; in vcn_v3_0_mc_resume() 586 int inst_idx = vinst->inst; in vcn_v3_0_mc_resume_dpg_mode() 684 int inst = vinst->inst; in vcn_v3_0_disable_static_power_gating() 737 int inst = vinst->inst; in vcn_v3_0_enable_static_power_gating() 791 int inst = vinst->inst; in vcn_v3_0_disable_clock_gating() 979 int inst = vinst->inst; in vcn_v3_0_enable_clock_gating() 1200 int i = vinst->inst; in vcn_v3_0_start() 1213 return vcn_v3_0_start_dpg_mode(vinst, vinst->indirect_sram); in vcn_v3_0_start() 1639 int i = vinst->inst; in vcn_v3_0_stop() [all …]
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| A D | vcn_v4_0_3.c | 300 int inst_idx = vinst->inst; in vcn_v4_0_3_hw_init_inst() 391 vinst->set_pg_state(vinst, AMD_PG_STATE_GATE); in vcn_v4_0_3_hw_fini() 458 int inst_idx = vinst->inst; in vcn_v4_0_3_mc_resume() 535 int inst_idx = vinst->inst; in vcn_v4_0_3_mc_resume_dpg_mode() 649 int inst_idx = vinst->inst; in vcn_v4_0_3_disable_clock_gating() 747 int inst_idx = vinst->inst; in vcn_v4_0_3_disable_clock_gating_dpg_mode() 796 int inst_idx = vinst->inst; in vcn_v4_0_3_enable_clock_gating() 850 int inst_idx = vinst->inst; in vcn_v4_0_3_start_dpg_mode() 1187 int i = vinst->inst; in vcn_v4_0_3_start() 1397 int i = vinst->inst; in vcn_v4_0_3_stop() [all …]
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| A D | vcn_v1_0.c | 287 vinst->set_pg_state(vinst, AMD_PG_STATE_GATE); in vcn_v1_0_hw_fini() 899 vcn_v1_0_mc_resume_spg_mode(vinst); in vcn_v1_0_start_spg_mode() 1088 vcn_v1_0_mc_resume_dpg_mode(vinst); in vcn_v1_0_start_dpg_mode() 1175 vcn_v1_0_start_dpg_mode(vinst) : vcn_v1_0_start_spg_mode(vinst); in vcn_v1_0_start() 1283 r = vcn_v1_0_stop_dpg_mode(vinst); in vcn_v1_0_stop() 1285 r = vcn_v1_0_stop_spg_mode(vinst); in vcn_v1_0_stop() 1294 int inst_idx = vinst->inst; in vcn_v1_0_pause_dpg_mode() 1856 if (state == vinst->cur_state) in vcn_v1_0_set_pg_state() 1860 ret = vcn_v1_0_stop(vinst); in vcn_v1_0_set_pg_state() 1862 ret = vcn_v1_0_start(vinst); in vcn_v1_0_set_pg_state() [all …]
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| A D | vcn_v2_5.c | 556 vinst->set_pg_state(vinst, AMD_PG_STATE_GATE); in vcn_v2_5_hw_fini() 623 int i = vinst->inst; in vcn_v2_5_mc_resume() 680 int inst_idx = vinst->inst; in vcn_v2_5_mc_resume_dpg_mode() 785 int i = vinst->inst; in vcn_v2_5_disable_clock_gating() 895 int inst_idx = vinst->inst; in vcn_v2_5_clock_gating_dpg_mode() 951 int i = vinst->inst; in vcn_v2_5_enable_clock_gating() 1185 int i = vinst->inst; in vcn_v2_5_start() 1258 vcn_v2_5_mc_resume(vinst); in vcn_v2_5_start() 1606 int i = vinst->inst; in vcn_v2_5_stop() 1964 r = vcn_v2_5_stop(vinst); in vcn_v2_5_reset() [all …]
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| A D | vcn_v2_0.c | 338 vinst->set_pg_state(vinst, AMD_PG_STATE_GATE); in vcn_v2_0_hw_fini() 1070 vcn_v2_0_mc_resume(vinst); in vcn_v2_0_start() 1226 r = vcn_v2_0_stop_dpg_mode(vinst); in vcn_v2_0_stop() 1278 vcn_v2_0_enable_clock_gating(vinst); in vcn_v2_0_stop() 1297 int inst_idx = vinst->inst; in vcn_v2_0_pause_dpg_mode() 1376 r = vcn_v2_0_stop(vinst); in vcn_v2_0_reset() 1379 return vcn_v2_0_start(vinst); in vcn_v2_0_reset() 1879 if (state == vinst->cur_state) in vcn_v2_0_set_pg_state() 1883 ret = vcn_v2_0_stop(vinst); in vcn_v2_0_set_pg_state() 1885 ret = vcn_v2_0_start(vinst); in vcn_v2_0_set_pg_state() [all …]
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| A D | amdgpu_vcn.c | 1450 ret |= vinst->set_pg_state(vinst, state); in vcn_set_powergating_state() 1469 mutex_lock(&vinst->engine_reset_mutex); in amdgpu_vcn_reset_engine() 1474 drm_sched_wqueue_stop(&vinst->ring_dec.sched); in amdgpu_vcn_reset_engine() 1475 for (i = 0; i < vinst->num_enc_rings; i++) in amdgpu_vcn_reset_engine() 1479 r = vinst->reset(vinst); in amdgpu_vcn_reset_engine() 1482 r = amdgpu_ring_test_ring(&vinst->ring_dec); in amdgpu_vcn_reset_engine() 1485 for (i = 0; i < vinst->num_enc_rings; i++) { in amdgpu_vcn_reset_engine() 1491 for (i = 0; i < vinst->num_enc_rings; i++) in amdgpu_vcn_reset_engine() 1498 drm_sched_wqueue_start(&vinst->ring_dec.sched); in amdgpu_vcn_reset_engine() 1499 for (i = 0; i < vinst->num_enc_rings; i++) in amdgpu_vcn_reset_engine() [all …]
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| A D | amdgpu_vcn.h | 329 int (*pause_dpg_mode)(struct amdgpu_vcn_inst *vinst, 331 int (*set_pg_state)(struct amdgpu_vcn_inst *vinst, 333 int (*reset)(struct amdgpu_vcn_inst *vinst);
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| /drivers/net/ethernet/microchip/sparx5/lan969x/ |
| A D | lan969x_vcap_impl.c | 9 .vinst = 0, 21 .vinst = 1, 33 .vinst = 2, 45 .vinst = 0, 57 .vinst = 1,
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| /drivers/net/ethernet/microchip/vcap/ |
| A D | vcap_api_debugfs.c | 282 out->prf(out->dst, "vinst: %d\n", admin->vinst); in vcap_show_admin_info() 378 if (admin->vinst) in vcap_port_debugfs_show() 450 admin->vinst); in vcap_debugfs() 459 admin->vinst); in vcap_debugfs()
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| A D | vcap_api_kunit.c | 77 if (admin->vinst == 0 || admin->vinst == 2) in test_add_def_fields() 1879 .vinst = 0, in vcap_api_next_lookup_basic_test() 1887 .vinst = 1, in vcap_api_next_lookup_basic_test() 1926 .vinst = 0, in vcap_api_next_lookup_advanced_test() 1933 .vinst = 1, in vcap_api_next_lookup_advanced_test() 1940 .vinst = 2, in vcap_api_next_lookup_advanced_test() 1947 .vinst = 0, in vcap_api_next_lookup_advanced_test() 1954 .vinst = 1, in vcap_api_next_lookup_advanced_test() 2194 .vinst = 0, in vcap_api_rule_chain_path_test()
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| A D | vcap_api_debugfs_kunit.c | 84 if (admin->vinst == 0 || admin->vinst == 2) in test_add_def_fields()
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| A D | vcap_api.h | 169 int vinst; /* instance number within the same type */ member
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| A D | vcap_api.c | 1607 int lookup_first = admin->vinst * admin->lookups_per_instance; in vcap_chain_id_to_lookup()
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| /drivers/net/ethernet/microchip/sparx5/ |
| A D | sparx5_vcap_impl.c | 51 .vinst = 0, 63 .vinst = 1, 75 .vinst = 2, 87 .vinst = 0, 99 .vinst = 1, 980 if (admin->vinst == 0) in sparx5_vcap_is2_cache_write() 1179 if (admin->vinst == 0) in sparx5_vcap_is2_cache_read() 1955 admin->vinst = cfg->vinst; in sparx5_vcap_admin_alloc() 2073 if (cfg->vinst == 0) in sparx5_vcap_init()
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| A D | sparx5_vcap_impl.h | 50 int vinst; /* instance number within the same type */ member
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| /drivers/net/ethernet/microchip/lan966x/ |
| A D | lan966x_vcap_impl.c | 624 admin->vinst = 0; in lan966x_vcap_admin_alloc()
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