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Searched refs:vswing (Results 1 – 12 of 12) sorted by relevance

/drivers/phy/st/
A Dphy-stm32-combophy.c96 u32 vswing[4]; member
119 u8 vswing_size = ARRAY_SIZE(imp_lookup[0].vswing); in stm32_impedance_tune()
124 u32 min_vswing = imp_lookup[0].vswing[0]; in stm32_impedance_tune()
150 max_vswing = imp_lookup[imp_of].vswing[vswing_size - 1]; in stm32_impedance_tune()
157 for (vswing_of = 0; vswing_of < ARRAY_SIZE(imp_lookup[imp_of].vswing); vswing_of++) in stm32_impedance_tune()
158 if (imp_lookup[imp_of].vswing[vswing_of] >= val) in stm32_impedance_tune()
161 if (WARN_ON(vswing_of == ARRAY_SIZE(imp_lookup[imp_of].vswing))) in stm32_impedance_tune()
165 imp_lookup[imp_of].vswing[vswing_of]); in stm32_impedance_tune()
/drivers/gpu/drm/gma500/
A Dintel_bios.c119 switch (edp_link_params->vswing) { in parse_edp()
121 dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; in parse_edp()
124 dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; in parse_edp()
127 dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; in parse_edp()
130 dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; in parse_edp()
134 dev_priv->edp.vswing, dev_priv->edp.preemphasis); in parse_edp()
A Dcdv_intel_dp.c1402 int vswing, premph, index; in cdv_intel_dp_set_vswing_premph() local
1409 vswing = (signal_level & DP_TRAIN_VOLTAGE_SWING_MASK); in cdv_intel_dp_set_vswing_premph()
1413 if (vswing + premph > 3) in cdv_intel_dp_set_vswing_premph()
1431 index = (vswing + premph) * 2; in cdv_intel_dp_set_vswing_premph()
1432 if (premph == 1 && vswing == 1) { in cdv_intel_dp_set_vswing_premph()
1438 if ((vswing + premph) == DP_TRAIN_VOLTAGE_SWING_LEVEL_3) in cdv_intel_dp_set_vswing_premph()
A Dintel_bios.h456 u8 vswing:4; member
A Dpsb_drv.h529 int vswing; member
/drivers/gpu/drm/i915/display/
A Dintel_ddi_buf_trans.h42 u8 vswing; member
48 u8 vswing; member
A Dintel_bios.c1506 switch (edp_link_params->vswing) { in parse_edp()
1508 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; in parse_edp()
1511 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; in parse_edp()
1514 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; in parse_edp()
1517 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; in parse_edp()
1522 edp_link_params->vswing); in parse_edp()
1527 u8 vswing; in parse_edp() local
1534 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; in parse_edp()
1535 panel->vbt.edp.low_vswing = vswing == 0; in parse_edp()
A Dintel_vbt_defs.h1048 u8 vswing:4; member
1058 u8 vswing:4; member
A Dintel_display_types.h343 int vswing; member
A Dintel_snps_phy.c83 val |= REG_FIELD_PREP(SNPS_PHY_TX_EQ_MAIN, trans->entries[level].snps.vswing); in intel_snps_phy_set_signal_levels()
A Dintel_ddi.c1424 DKL_TX_VSWING_CONTROL(trans->entries[level].dkl.vswing)); in tgl_dkl_phy_set_signal_levels()
1434 DKL_TX_VSWING_CONTROL(trans->entries[level].dkl.vswing)); in tgl_dkl_phy_set_signal_levels()
A Dintel_cx0_phy.c505 C10_PHY_OVRD_LEVEL(trans->entries[level].snps.vswing), in intel_cx0_phy_set_signal_levels()

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