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Searched refs:wait_for (Results 1 – 25 of 50) sorted by relevance

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/drivers/gpu/drm/v3d/
A Dv3d_gem.c50 if (wait_for((V3D_CORE_READ(core, V3D_GMP_STATUS(v3d->ver)) & in v3d_idle_axi()
66 if (wait_for((V3D_GCA_READ(V3D_GCA_SAFE_SHUTDOWN_ACK) & in v3d_idle_gca()
115 if (wait_for(!(V3D_GET_FIELD(V3D_SMS_READ(V3D_SMS_REE_CS), in v3d_reset_sms()
216 if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) & in v3d_clean_caches()
226 if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) & in v3d_clean_caches()
A Dv3d_mmu.c45 ret = wait_for(!(V3D_READ(V3D_MMUC_CONTROL) & in v3d_mmu_flush_all()
55 ret = wait_for(!(V3D_READ(V3D_MMU_CTL) & in v3d_mmu_flush_all()
A Dv3d_drv.c274 if (wait_for((V3D_GET_FIELD(V3D_SMS_READ(V3D_SMS_TEE_CS), in v3d_idle_sms()
290 if (wait_for((V3D_GET_FIELD(V3D_SMS_READ(V3D_SMS_TEE_CS), in v3d_power_off_sms()
A Dv3d_drv.h522 #define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 10, 1000) macro
/drivers/mmc/host/
A Dsh_mmcif.c232 enum sh_mmcif_wait_for wait_for; member
588 host->state, host->wait_for); in sh_mmcif_error_manage()
592 host->state, host->wait_for); in sh_mmcif_error_manage()
596 host->state, host->wait_for); in sh_mmcif_error_manage()
613 host->wait_for = MMCIF_WAIT_FOR_READ; in sh_mmcif_single_read()
982 host->wait_for = MMCIF_WAIT_FOR_CMD; in sh_mmcif_start_cmd()
1005 host->wait_for = MMCIF_WAIT_FOR_STOP; in sh_mmcif_stop_cmd()
1225 wait_work = host->wait_for; in sh_mmcif_irqt()
1235 host->state, host->wait_for); in sh_mmcif_irqt()
1377 host->wait_for, mrq->cmd->opcode); in sh_mmcif_timeout_work()
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/drivers/gpu/drm/gma500/
A Dintel_gmbus.c53 #define wait_for(COND, MS) _wait_for(COND, MS, 1) macro
279 if (wait_for(GMBUS_REG_READ(GMBUS2 + reg_offset) & in gmbus_xfer()
308 if (wait_for(GMBUS_REG_READ(GMBUS2 + reg_offset) & in gmbus_xfer()
325 …if (i + 1 < num && wait_for(GMBUS_REG_READ(GMBUS2 + reg_offset) & (GMBUS_SATOER | GMBUS_HW_WAIT_PH… in gmbus_xfer()
A Dcdv_intel_display.c127 #define wait_for(COND, MS) _wait_for(COND, MS, 1) macro
134 ret = wait_for((REG_READ(SB_PCKT) & SB_BUSY) == 0, 1000); in cdv_sb_read()
146 ret = wait_for((REG_READ(SB_PCKT) & SB_BUSY) == 0, 1000); in cdv_sb_read()
169 ret = wait_for((REG_READ(SB_PCKT) & SB_BUSY) == 0, 1000); in cdv_sb_write()
182 ret = wait_for((REG_READ(SB_PCKT) & SB_BUSY) == 0, 1000); in cdv_sb_write()
A Dcdv_intel_dp.c246 #define wait_for(COND, MS) _wait_for(COND, MS, 1) macro
428 if (wait_for(((REG_READ(PP_STATUS) & idle_on_mask) == idle_on_mask), 1000)) { in cdv_intel_edp_panel_on()
462 if (wait_for((REG_READ(PP_STATUS) & idle_off_mask) == 0, 1000)) { in cdv_intel_edp_panel_off()
/drivers/gpu/drm/i915/gt/uc/
A Dintel_gsc_uc_heci_cmd_submit.c89 if (wait_for(i915_request_started(rq), GSC_HECI_REPLY_LATENCY_MS)) in intel_gsc_uc_heci_cmd_submit_packet()
202 if (wait_for(i915_request_started(rq), GSC_HECI_REPLY_LATENCY_MS)) in intel_gsc_uc_heci_cmd_submit_nonpriv()
A Dintel_gsc_proxy.c150 err = wait_for(*marker != 0, 300); in proxy_send_to_gsc()
266 err = wait_for(gsc->proxy.component, GSC_PROXY_INIT_TIMEOUT_MS); in intel_gsc_proxy_request_handler()
A Dintel_guc_fw.c191 ret = wait_for(guc_load_done(uncore, &status, &success), 1000); in guc_wait_ucode()
A Dselftest_guc.c362 ret = wait_for(gt->uc.guc.fast_response_selftest != 1 || i915_request_completed(rq), in intel_guc_fast_request()
/drivers/gpu/drm/i915/selftests/
A Di915_selftest.c154 if (need_to_wait && wait_for(!__gsc_proxy_init_progressing(&i915->media_gt->uc.gsc), in __wait_gsc_proxy_completed()
179 wait_for(i915_sw_fence_done(&huc->delayed_load.fence), timeout_ms)) in __wait_gsc_huc_load_completed()
A Digt_spinner.c261 wait_for(i915_seqno_passed(hws_seqno(spin, rq), in igt_wait_for_spinner()
A Di915_request.c2059 if (wait_for(READ_ONCE(*sema) == 0, 50)) { in measure_semaphore_response()
2070 if (wait_for(READ_ONCE(*sema) == 0, 50)) { in measure_semaphore_response()
2204 if (i > 1 && wait_for(READ_ONCE(sema[i - 1]), 500)) { in measure_busy_dispatch()
2218 wait_for(READ_ONCE(sema[i - 1]), 500); in measure_busy_dispatch()
2501 if (wait_for(READ_ONCE(sema[2 * i]) == -1, 500)) { in measure_preemption()
2529 if (wait_for(READ_ONCE(sema[2 * i - 2]) != -1, 500)) { in measure_preemption()
2616 if (wait_for(READ_ONCE(sema[i]) == -1, 50)) { in measure_completion()
A Dintel_uncore.c262 if (wait_for(readl(reg) == 0, 100)) { in live_forcewake_ops()
/drivers/gpu/drm/i915/gt/
A Dintel_gt_mcr.c355 err = wait_for(intel_uncore_read_fw(gt->uncore, in intel_gt_mcr_lock()
865 ret = wait_for(done, slow_timeout_ms); in intel_gt_mcr_wait_for_reg()
A Dselftest_rps.c192 if (wait_for(!intel_rps_set(rps, freq), 50)) { in rps_set_check()
289 if (wait_for(intel_uncore_read_fw(gt->uncore, in live_rps_clock_interval()
668 if (wait_for(intel_uncore_read(engine->uncore, CS_GPR(0)), in live_rps_frequency_cs()
807 if (wait_for(READ_ONCE(*cntr), 10)) { in live_rps_frequency_srm()
A Dselftest_tlb.c173 if (wait_for(i915_request_completed(rq), HZ / 2)) { in pte_tlbinv()
A Dselftest_hangcheck.c279 wait_for(i915_seqno_passed(hws_seqno(h, rq), in wait_until_running()
345 return wait_for(intel_engine_is_idle(engine), IGT_IDLE_TIMEOUT) == 0; in wait_for_idle()
1544 if (wait_for(!list_empty(&rq->fence.cb_list), 10)) { in __igt_reset_evict_vma()
/drivers/gpu/drm/i915/
A Di915_utils.h268 #define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 10, 1000) macro
/drivers/gpu/drm/i915/pxp/
A Dintel_pxp.c408 if (wait_for(pxp_fw_dependencies_completed(pxp), timeout_ms)) in intel_pxp_get_readiness_status()
/drivers/gpu/drm/vc4/
A Dvc4_hdmi.c625 ret = wait_for(!(HDMI_READ(HDMI_RAM_PACKET_STATUS) & in vc4_hdmi_stop_packet()
702 ret = wait_for((HDMI_READ(HDMI_RAM_PACKET_STATUS) & in vc4_hdmi_write_infoframe()
1390 ret = wait_for(HDMI_READ(HDMI_FIFO_CTL) & in vc4_hdmi_recenter_fifo()
1586 ret = wait_for(HDMI_READ(HDMI_SCHEDULER_CONTROL) & in vc4_hdmi_encoder_post_crtc_enable()
1600 ret = wait_for(!(HDMI_READ(HDMI_SCHEDULER_CONTROL) & in vc4_hdmi_encoder_post_crtc_enable()
/drivers/scsi/
A Dscsi_lib.c761 unsigned long wait_for; in scsi_cmd_runtime_exceeced() local
766 wait_for = (cmd->allowed + 1) * req->timeout; in scsi_cmd_runtime_exceeced()
767 if (time_before(cmd->jiffies_at_alloc + wait_for, jiffies)) { in scsi_cmd_runtime_exceeced()
769 wait_for/HZ); in scsi_cmd_runtime_exceeced()
/drivers/gpu/drm/i915/display/
A Dintel_display_power_well.c556 if (wait_for(intel_dkl_phy_read(display, DKL_CMN_UC_DW_27(tc_port)) & in icl_tc_phy_aux_power_well_enable()
1143 if (wait_for(COND, 100)) in vlv_set_power_well()
1730 if (wait_for(COND, 100)) in chv_set_pipe_power_well()

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