| /drivers/gpu/drm/amd/amdgpu/ |
| A D | gfx_v9_4_2.c | 422 uint32_t se, cu, simd, wave; in gfx_v9_4_2_log_wave_assignment() local 439 for (wave = 0; wave < WAVE_ID_MAX; wave++) { in gfx_v9_4_2_log_wave_assignment() 456 uint32_t se, cu, simd, wave; in gfx_v9_4_2_wait_for_waves_assigned() local 468 for (wave = 0; wave < WAVE_ID_MAX; wave++) { in gfx_v9_4_2_wait_for_waves_assigned() 469 if (((1 << wave) & mask) && in gfx_v9_4_2_wait_for_waves_assigned() 1807 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind() 1818 uint32_t i, simd, wave; in gfx_v9_4_2_log_cu_timeout_status() local 1830 wave = i % cu_info->max_waves_per_simd; in gfx_v9_4_2_log_cu_timeout_status() 1836 wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v9_4_2_log_cu_timeout_status() 1838 wave_read_ind(adev, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v9_4_2_log_cu_timeout_status() [all …]
|
| A D | gfx_v6_0.c | 2947 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind() 2955 uint32_t wave, uint32_t thread, in wave_read_regs() argument 2959 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs() 2973 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v6_0_read_wave_data() 2974 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v6_0_read_wave_data() 2975 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v6_0_read_wave_data() 2978 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); in gfx_v6_0_read_wave_data() 2990 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); in gfx_v6_0_read_wave_data() 2991 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_MODE); in gfx_v6_0_read_wave_data() 2995 uint32_t wave, uint32_t start, in gfx_v6_0_read_wave_sgprs() argument [all …]
|
| A D | gfx_v7_0.c | 4016 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind() 4024 uint32_t wave, uint32_t thread, in wave_read_regs() argument 4028 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs() 4042 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v7_0_read_wave_data() 4043 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v7_0_read_wave_data() 4044 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v7_0_read_wave_data() 4047 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); in gfx_v7_0_read_wave_data() 4059 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); in gfx_v7_0_read_wave_data() 4060 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_MODE); in gfx_v7_0_read_wave_data() 4064 uint32_t wave, uint32_t start, in gfx_v7_0_read_wave_sgprs() argument [all …]
|
| A D | gfx_v12_0.c | 820 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind() 830 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs() 840 uint32_t simd, uint32_t wave, in gfx_v12_0_read_wave_data() argument 851 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_LO); in gfx_v12_0_read_wave_data() 852 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_HI); in gfx_v12_0_read_wave_data() 862 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_M0); in gfx_v12_0_read_wave_data() 863 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_MODE); in gfx_v12_0_read_wave_data() 877 uint32_t wave, uint32_t start, in gfx_v12_0_read_wave_sgprs() argument 883 adev, wave, 0, start + SQIND_WAVE_SGPRS_OFFSET, size, in gfx_v12_0_read_wave_sgprs() 889 uint32_t wave, uint32_t thread, in gfx_v12_0_read_wave_vgprs() argument [all …]
|
| A D | amdgpu_debugfs.c | 434 adev->gfx.funcs->read_wave_data(adev, rd->id.xcc_id, rd->id.simd, rd->id.wave, data, &x); in amdgpu_debugfs_gprwave_read() 439 …adev->gfx.funcs->read_wave_vgprs(adev, rd->id.xcc_id, rd->id.simd, rd->id.wave, rd->id.gpr.thread,… in amdgpu_debugfs_gprwave_read() 442 …adev->gfx.funcs->read_wave_sgprs(adev, rd->id.xcc_id, rd->id.simd, rd->id.wave, *pos, size>>2, dat… in amdgpu_debugfs_gprwave_read() 1061 uint32_t offset, se, sh, cu, wave, simd, data[32]; in amdgpu_debugfs_wave_read() local 1071 wave = (*pos & GENMASK_ULL(36, 31)) >> 31; in amdgpu_debugfs_wave_read() 1092 adev->gfx.funcs->read_wave_data(adev, 0, simd, wave, data, &x); in amdgpu_debugfs_wave_read() 1153 uint32_t offset, se, sh, cu, wave, simd, thread, bank, *data; in amdgpu_debugfs_gpr_read() local 1163 wave = (*pos & GENMASK_ULL(43, 36)) >> 36; in amdgpu_debugfs_gpr_read() 1186 adev->gfx.funcs->read_wave_vgprs(adev, 0, simd, wave, thread, offset, size>>2, data); in amdgpu_debugfs_gpr_read() 1189 adev->gfx.funcs->read_wave_sgprs(adev, 0, simd, wave, offset, size>>2, data); in amdgpu_debugfs_gpr_read()
|
| A D | amdgpu_umr.h | 50 u32 gpr_or_wave, se, sh, cu, wave, simd, xcc_id; member
|
| A D | gfx_v9_4_3.c | 719 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind() 727 uint32_t wave, uint32_t thread, in wave_read_regs() argument 731 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs() 742 uint32_t xcc_id, uint32_t simd, uint32_t wave, in gfx_v9_4_3_read_wave_data() argument 748 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v9_4_3_read_wave_data() 760 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_M0); in gfx_v9_4_3_read_wave_data() 761 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_MODE); in gfx_v9_4_3_read_wave_data() 765 uint32_t wave, uint32_t start, in gfx_v9_4_3_read_wave_sgprs() argument 768 wave_read_regs(adev, xcc_id, simd, wave, 0, in gfx_v9_4_3_read_wave_sgprs() 773 uint32_t wave, uint32_t thread, in gfx_v9_4_3_read_wave_vgprs() argument [all …]
|
| A D | amdgpu_gfx.h | 339 uint32_t wave, uint32_t *dst, int *no_fields); 341 uint32_t wave, uint32_t thread, uint32_t start, 344 uint32_t wave, uint32_t start, uint32_t size,
|
| A D | gfx_v8_0.c | 5154 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind() 5162 uint32_t wave, uint32_t thread, in wave_read_regs() argument 5166 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs() 5180 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v8_0_read_wave_data() 5181 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v8_0_read_wave_data() 5182 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v8_0_read_wave_data() 5185 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); in gfx_v8_0_read_wave_data() 5197 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); in gfx_v8_0_read_wave_data() 5198 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_MODE); in gfx_v8_0_read_wave_data() 5202 uint32_t wave, uint32_t start, in gfx_v8_0_read_wave_sgprs() argument [all …]
|
| A D | gfx_v11_0.c | 976 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind() 986 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs() 1003 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_STATUS); in gfx_v11_0_read_wave_data() 1004 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_LO); in gfx_v11_0_read_wave_data() 1005 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_HI); in gfx_v11_0_read_wave_data() 1016 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_M0); in gfx_v11_0_read_wave_data() 1017 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_MODE); in gfx_v11_0_read_wave_data() 1021 uint32_t wave, uint32_t start, in gfx_v11_0_read_wave_sgprs() argument 1027 adev, wave, 0, start + SQIND_WAVE_SGPRS_OFFSET, size, in gfx_v11_0_read_wave_sgprs() 1032 uint32_t wave, uint32_t thread, in gfx_v11_0_read_wave_vgprs() argument [all …]
|
| A D | gfx_v9_0.c | 1933 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind() 1941 uint32_t wave, uint32_t thread, in wave_read_regs() argument 1945 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs() 1960 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v9_0_read_wave_data() 1961 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v9_0_read_wave_data() 1972 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); in gfx_v9_0_read_wave_data() 1973 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_MODE); in gfx_v9_0_read_wave_data() 1977 uint32_t wave, uint32_t start, in gfx_v9_0_read_wave_sgprs() argument 1981 adev, simd, wave, 0, in gfx_v9_0_read_wave_sgprs() 1986 uint32_t wave, uint32_t thread, in gfx_v9_0_read_wave_vgprs() argument [all …]
|
| A D | gfx_v10_0.c | 4481 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind() 4491 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs() 4509 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_STATUS); in gfx_v10_0_read_wave_data() 4510 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_LO); in gfx_v10_0_read_wave_data() 4511 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_HI); in gfx_v10_0_read_wave_data() 4523 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_M0); in gfx_v10_0_read_wave_data() 4524 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_MODE); in gfx_v10_0_read_wave_data() 4528 uint32_t wave, uint32_t start, in gfx_v10_0_read_wave_sgprs() argument 4534 adev, wave, 0, start + SQIND_WAVE_SGPRS_OFFSET, size, in gfx_v10_0_read_wave_sgprs() 4539 uint32_t wave, uint32_t thread, in gfx_v10_0_read_wave_vgprs() argument [all …]
|
| /drivers/gpu/ipu-v3/ |
| A D | ipu-dc.c | 120 int map, int wave, int glue, int sync, int stop) in dc_write_tmpl() argument 129 reg1 = sync | glue << 4 | ++wave << 11 | ((operand << 15) & 0xffff8000); in dc_write_tmpl() 132 reg1 = sync | glue << 4 | ++wave << 11 | ++map << 15 | ((operand << 20) & 0xfff00000); in dc_write_tmpl()
|