| /drivers/gpu/drm/amd/pm/swsmu/ |
| A D | amdgpu_smu.c | 2191 smu->workload_mask = 0; in smu_suspend()
2321 u32 workload_mask = 0; in smu_bump_power_profile_mode() local
2326 workload_mask |= 1 << i; in smu_bump_power_profile_mode()
2329 if (smu->workload_mask == workload_mask) in smu_bump_power_profile_mode()
2333 ret = smu->ppt_funcs->set_power_profile_mode(smu, workload_mask, in smu_bump_power_profile_mode()
2338 smu->workload_mask = workload_mask; in smu_bump_power_profile_mode()
2490 u32 workload_mask = 1 << PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT; in smu_pause_power_profile() local
2503 workload_mask, in smu_pause_power_profile()
3225 smu->workload_mask = 0; in smu_set_power_profile_mode()
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| A D | smu_cmn.h | 174 u32 workload_mask,
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| A D | smu_cmn.c | 1171 u32 workload_mask, in smu_cmn_get_backend_workload_mask() argument
1180 if (!(workload_mask & (1 << profile_mode))) in smu_cmn_get_backend_workload_mask()
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| /drivers/gpu/drm/amd/pm/powerplay/ |
| A D | amd_powerplay.c | 935 hwmgr->workload_mask &= ~(1 << hwmgr->workload_prority[type]); in pp_dpm_switch_power_profile()
936 index = fls(hwmgr->workload_mask); in pp_dpm_switch_power_profile()
940 hwmgr->workload_mask |= (1 << hwmgr->workload_prority[type]); in pp_dpm_switch_power_profile()
941 index = fls(hwmgr->workload_mask); in pp_dpm_switch_power_profile()
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| /drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| A D | pp_psm.c | 298 index = fls(hwmgr->workload_mask); in psm_adjust_power_state_dynamic()
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| A D | vega12_hwmgr.h | 387 uint32_t workload_mask; member
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| A D | vega20_hwmgr.h | 515 uint32_t workload_mask; member
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| A D | vega12_hwmgr.c | 407 data->workload_mask = 0xff; in vega12_hwmgr_backend_init()
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| A D | vega20_hwmgr.c | 445 hwmgr->workload_mask = 1 << hwmgr->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT]; in vega20_hwmgr_backend_init()
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| A D | smu7_hwmgr.c | 1859 hwmgr->workload_mask = 1 << hwmgr->workload_prority[PP_SMC_POWER_PROFILE_FULLSCREEN3D]; in smu7_init_dpm_defaults()
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| A D | vega10_hwmgr.c | 840 hwmgr->workload_mask = 1 << hwmgr->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT]; in vega10_hwmgr_backend_init()
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| /drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| A D | arcturus_ppt.c | 1512 u32 workload_mask, in arcturus_set_power_profile_mode() argument
1519 smu_cmn_get_backend_workload_mask(smu, workload_mask, in arcturus_set_power_profile_mode()
1522 if (workload_mask & (1 << PP_SMC_POWER_PROFILE_CUSTOM)) { in arcturus_set_power_profile_mode()
1558 workload_mask); in arcturus_set_power_profile_mode()
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| A D | vangogh_ppt.c | 1053 u32 workload_mask, in vangogh_set_power_profile_mode() argument
1060 smu_cmn_get_backend_workload_mask(smu, workload_mask, in vangogh_set_power_profile_mode()
1068 workload_mask); in vangogh_set_power_profile_mode()
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| A D | sienna_cichlid_ppt.c | 1780 u32 workload_mask, in sienna_cichlid_set_power_profile_mode() argument
1787 smu_cmn_get_backend_workload_mask(smu, workload_mask, in sienna_cichlid_set_power_profile_mode()
1790 if (workload_mask & (1 << PP_SMC_POWER_PROFILE_CUSTOM)) { in sienna_cichlid_set_power_profile_mode()
1822 workload_mask); in sienna_cichlid_set_power_profile_mode()
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| A D | navi10_ppt.c | 2079 u32 workload_mask, in navi10_set_power_profile_mode() argument
2086 smu_cmn_get_backend_workload_mask(smu, workload_mask, in navi10_set_power_profile_mode()
2089 if (workload_mask & (1 << PP_SMC_POWER_PROFILE_CUSTOM)) { in navi10_set_power_profile_mode()
2120 workload_mask); in navi10_set_power_profile_mode()
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| /drivers/gpu/drm/amd/pm/swsmu/smu12/ |
| A D | renoir_ppt.c | 863 u32 workload_mask, in renoir_set_power_profile_mode() argument
870 smu_cmn_get_backend_workload_mask(smu, workload_mask, in renoir_set_power_profile_mode()
878 workload_mask); in renoir_set_power_profile_mode()
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| /drivers/gpu/drm/amd/pm/swsmu/inc/ |
| A D | amdgpu_smu.h | 563 uint32_t workload_mask; member
744 int (*set_power_profile_mode)(struct smu_context *smu, u32 workload_mask,
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| /drivers/gpu/drm/amd/pm/swsmu/smu14/ |
| A D | smu_v14_0_2_ppt.c | 1866 u32 workload_mask, in smu_v14_0_2_set_power_profile_mode() argument
1873 smu_cmn_get_backend_workload_mask(smu, workload_mask, in smu_v14_0_2_set_power_profile_mode()
1877 if (workload_mask & (1 << PP_SMC_POWER_PROFILE_COMPUTE)) in smu_v14_0_2_set_power_profile_mode()
1882 if (workload_mask & (1 << PP_SMC_POWER_PROFILE_CUSTOM)) { in smu_v14_0_2_set_power_profile_mode()
1914 workload_mask); in smu_v14_0_2_set_power_profile_mode()
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| /drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| A D | smu_v13_0_0_ppt.c | 2625 u32 workload_mask, in smu_v13_0_0_set_power_profile_mode() argument
2632 smu_cmn_get_backend_workload_mask(smu, workload_mask, in smu_v13_0_0_set_power_profile_mode()
2636 if ((workload_mask & (1 << PP_SMC_POWER_PROFILE_COMPUTE)) && in smu_v13_0_0_set_power_profile_mode()
2649 if (workload_mask & (1 << PP_SMC_POWER_PROFILE_CUSTOM)) { in smu_v13_0_0_set_power_profile_mode()
2683 workload_mask); in smu_v13_0_0_set_power_profile_mode()
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| A D | smu_v13_0_7_ppt.c | 2579 u32 workload_mask, in smu_v13_0_7_set_power_profile_mode() argument
2586 smu_cmn_get_backend_workload_mask(smu, workload_mask, in smu_v13_0_7_set_power_profile_mode()
2589 if (workload_mask & (1 << PP_SMC_POWER_PROFILE_CUSTOM)) { in smu_v13_0_7_set_power_profile_mode()
2622 workload_mask); in smu_v13_0_7_set_power_profile_mode()
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| /drivers/gpu/drm/amd/pm/powerplay/inc/ |
| A D | hwmgr.h | 805 uint32_t workload_mask; member
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