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Searched refs:wp (Results 1 – 25 of 75) sorted by relevance

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/drivers/gpu/drm/omapdrm/dss/
A Dhdmi_wp.c44 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp) in hdmi_wp_get_irqstatus() argument
53 hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_set_irqstatus()
102 int hdmi_wp_video_start(struct hdmi_wp_data *wp) in hdmi_wp_video_start() argument
109 void hdmi_wp_video_stop(struct hdmi_wp_data *wp) in hdmi_wp_video_stop() argument
178 if (wp->version == 4) in hdmi_wp_video_config_timing()
233 if (wp->version == 4) { in hdmi_wp_audio_config_format()
285 if (IS_ERR(wp->base)) in hdmi_wp_init()
286 return PTR_ERR(wp->base); in hdmi_wp_init()
288 wp->phys_base = res->start; in hdmi_wp_init()
289 wp->version = version; in hdmi_wp_init()
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A Dhdmi.h239 struct hdmi_wp_data *wp; member
261 struct hdmi_wp_data *wp; member
296 int hdmi_wp_video_start(struct hdmi_wp_data *wp);
297 void hdmi_wp_video_stop(struct hdmi_wp_data *wp);
299 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp);
305 void hdmi_wp_video_config_format(struct hdmi_wp_data *wp,
309 void hdmi_wp_video_config_timing(struct hdmi_wp_data *wp,
320 struct hdmi_pll_data *pll, struct hdmi_wp_data *wp);
339 void hdmi_wp_audio_config_format(struct hdmi_wp_data *wp,
341 void hdmi_wp_audio_config_dma(struct hdmi_wp_data *wp,
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A Dhdmi5.c68 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_irq_handler() local
71 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
72 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
173 hdmi_wp_set_irqstatus(&hdmi->wp, in hdmi_power_on_full()
174 hdmi_wp_get_irqstatus(&hdmi->wp)); in hdmi_power_on_full()
205 r = hdmi_wp_video_start(&hdmi->wp); in hdmi_power_on_full()
209 hdmi_wp_set_irqenable(&hdmi->wp, in hdmi_power_on_full()
231 hdmi_wp_video_stop(&hdmi->wp); in hdmi_power_off_full()
253 hdmi_wp_dump(&hdmi->wp, s); in hdmi_dump_regs()
266 hdmi_wp_audio_enable(&hd->wp, true); in hdmi_start_audio_stream()
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A Dhdmi4.c67 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_irq_handler() local
70 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
71 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
150 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_power_on_full() local
206 r = hdmi_wp_video_start(&hdmi->wp); in hdmi_power_on_full()
210 hdmi_wp_set_irqenable(wp, in hdmi_power_on_full()
232 hdmi_wp_video_stop(&hdmi->wp); in hdmi_power_off_full()
254 hdmi_wp_dump(&hdmi->wp, s); in hdmi_dump_regs()
266 hdmi_wp_audio_enable(&hd->wp, true); in hdmi_start_audio_stream()
272 hdmi4_audio_stop(&hd->core, &hd->wp); in hdmi_stop_audio_stream()
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A Dhdmi_pll.c42 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_enable() local
50 r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS); in hdmi_pll_enable()
60 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_disable() local
63 hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF); in hdmi_pll_disable()
147 if (hpll->wp->version == 4) in hdmi_init_pll_data()
162 struct hdmi_pll_data *pll, struct hdmi_wp_data *wp) in hdmi_pll_init() argument
167 pll->wp = wp; in hdmi_pll_init()
A Dhdmi4_cec.c164 hdmi_wp_clear_irqenable(core->wp, HDMI_IRQ_CORE); in hdmi_cec_adap_enable()
165 hdmi_wp_set_irqstatus(core->wp, HDMI_IRQ_CORE); in hdmi_cec_adap_enable()
166 REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0, 5, 0); in hdmi_cec_adap_enable()
178 REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0x18, 5, 0); in hdmi_cec_adap_enable()
201 hdmi_wp_set_irqenable(core->wp, HDMI_IRQ_CORE); in hdmi_cec_adap_enable()
238 REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0, 5, 0); in hdmi_cec_adap_enable()
326 struct hdmi_wp_data *wp) in hdmi4_cec_init() argument
337 core->wp = wp; in hdmi4_cec_init()
340 REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0, 5, 0); in hdmi4_cec_init()
A Dhdmi4_core.c257 struct hdmi_wp_data *wp, struct hdmi_config *cfg) in hdmi4_configure() argument
270 hdmi_wp_video_config_timing(wp, &vm); in hdmi4_configure()
275 hdmi_wp_video_config_format(wp, &video_format); in hdmi4_configure()
277 hdmi_wp_video_config_interface(wp, &vm); in hdmi4_configure()
632 int hdmi4_audio_config(struct hdmi_core_data *core, struct hdmi_wp_data *wp, in hdmi4_audio_config() argument
802 hdmi_wp_audio_config_dma(wp, &audio_dma); in hdmi4_audio_config()
803 hdmi_wp_audio_config_format(wp, &audio_format); in hdmi4_audio_config()
814 int hdmi4_audio_start(struct hdmi_core_data *core, struct hdmi_wp_data *wp) in hdmi4_audio_start() argument
819 hdmi_wp_audio_core_req_enable(wp, true); in hdmi4_audio_start()
824 void hdmi4_audio_stop(struct hdmi_core_data *core, struct hdmi_wp_data *wp) in hdmi4_audio_stop() argument
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A Dhdmi4_core.h255 void hdmi4_configure(struct hdmi_core_data *core, struct hdmi_wp_data *wp,
264 int hdmi4_audio_start(struct hdmi_core_data *core, struct hdmi_wp_data *wp);
265 void hdmi4_audio_stop(struct hdmi_core_data *core, struct hdmi_wp_data *wp);
266 int hdmi4_audio_config(struct hdmi_core_data *core, struct hdmi_wp_data *wp,
/drivers/video/fbdev/omap2/omapfb/dss/
A Dhdmi_wp.c45 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp) in hdmi_wp_get_irqstatus() argument
47 return hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_get_irqstatus()
54 hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_set_irqstatus()
103 int hdmi_wp_video_start(struct hdmi_wp_data *wp) in hdmi_wp_video_start() argument
110 void hdmi_wp_video_stop(struct hdmi_wp_data *wp) in hdmi_wp_video_stop() argument
154 r = hdmi_read_reg(wp->base, HDMI_WP_VIDEO_CFG); in hdmi_wp_video_config_interface()
159 hdmi_write_reg(wp->base, HDMI_WP_VIDEO_CFG, r); in hdmi_wp_video_config_interface()
267 wp->phys_base = res->start; in hdmi_wp_init()
270 if (IS_ERR(wp->base)) { in hdmi_wp_init()
272 return PTR_ERR(wp->base); in hdmi_wp_init()
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A Dhdmi.h233 struct hdmi_wp_data *wp; member
277 int hdmi_wp_video_start(struct hdmi_wp_data *wp);
278 void hdmi_wp_video_stop(struct hdmi_wp_data *wp);
280 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp);
286 void hdmi_wp_video_config_format(struct hdmi_wp_data *wp,
288 void hdmi_wp_video_config_interface(struct hdmi_wp_data *wp,
290 void hdmi_wp_video_config_timing(struct hdmi_wp_data *wp,
302 struct hdmi_wp_data *wp);
320 void hdmi_wp_audio_config_format(struct hdmi_wp_data *wp,
322 void hdmi_wp_audio_config_dma(struct hdmi_wp_data *wp,
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A Dhdmi5.c65 struct hdmi_wp_data *wp = data; in hdmi_irq_handler() local
68 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
69 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
179 hdmi_wp_set_irqstatus(&hdmi.wp, in hdmi_power_on_full()
180 hdmi_wp_get_irqstatus(&hdmi.wp)); in hdmi_power_on_full()
213 r = hdmi_wp_video_start(&hdmi.wp); in hdmi_power_on_full()
221 hdmi_wp_set_irqenable(&hdmi.wp, in hdmi_power_on_full()
227 hdmi_wp_video_stop(&hdmi.wp); in hdmi_power_on_full()
247 hdmi_wp_video_stop(&hdmi.wp); in hdmi_power_off_full()
298 hdmi_wp_dump(&hdmi.wp, s); in hdmi_dump_regs()
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A Dhdmi4.c61 struct hdmi_wp_data *wp = data; in hdmi_irq_handler() local
64 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
65 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
148 struct hdmi_wp_data *wp = &hdmi.wp; in hdmi_power_on_full() local
196 r = hdmi_wp_video_start(&hdmi.wp); in hdmi_power_on_full()
204 hdmi_wp_set_irqenable(wp, in hdmi_power_on_full()
210 hdmi_wp_video_stop(&hdmi.wp); in hdmi_power_on_full()
230 hdmi_wp_video_stop(&hdmi.wp); in hdmi_power_off_full()
277 hdmi_wp_dump(&hdmi.wp, s); in hdmi_dump_regs()
305 hdmi_wp_audio_enable(&hd->wp, true); in hdmi_start_audio_stream()
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A Dhdmi_pll.c102 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_enable() local
106 return hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS); in hdmi_pll_enable()
112 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_disable() local
114 hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF); in hdmi_pll_disable()
209 struct hdmi_wp_data *wp) in hdmi_pll_init() argument
213 pll->wp = wp; in hdmi_pll_init()
A Dhdmi4_core.h253 void hdmi4_configure(struct hdmi_core_data *core, struct hdmi_wp_data *wp,
258 int hdmi4_audio_start(struct hdmi_core_data *core, struct hdmi_wp_data *wp);
259 void hdmi4_audio_stop(struct hdmi_core_data *core, struct hdmi_wp_data *wp);
260 int hdmi4_audio_config(struct hdmi_core_data *core, struct hdmi_wp_data *wp,
A Dhdmi4_core.c299 struct hdmi_wp_data *wp, struct hdmi_config *cfg) in hdmi4_configure() argument
312 hdmi_wp_video_config_timing(wp, &video_timing); in hdmi4_configure()
317 hdmi_wp_video_config_format(wp, &video_format); in hdmi4_configure()
319 hdmi_wp_video_config_interface(wp, &video_timing); in hdmi4_configure()
676 int hdmi4_audio_config(struct hdmi_core_data *core, struct hdmi_wp_data *wp, in hdmi4_audio_config() argument
846 hdmi_wp_audio_config_dma(wp, &audio_dma); in hdmi4_audio_config()
847 hdmi_wp_audio_config_format(wp, &audio_format); in hdmi4_audio_config()
858 int hdmi4_audio_start(struct hdmi_core_data *core, struct hdmi_wp_data *wp) in hdmi4_audio_start() argument
863 hdmi_wp_audio_core_req_enable(wp, true); in hdmi4_audio_start()
868 void hdmi4_audio_stop(struct hdmi_core_data *core, struct hdmi_wp_data *wp) in hdmi4_audio_stop() argument
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/drivers/accel/ivpu/
A Divpu_hw_btrs.c268 wp_request_mtl(vdev, wp); in wp_request()
270 wp_request_lnl(vdev, wp); in wp_request()
283 wp_request(vdev, wp); in wp_request_send()
296 wp->min = hw->pll.min_ratio; in prepare_wp_request()
297 wp->max = hw->pll.max_ratio; in prepare_wp_request()
302 wp->cdyn = 0; in prepare_wp_request()
303 wp->epp = 0; in prepare_wp_request()
305 wp->target = hw->pll.pn_ratio; in prepare_wp_request()
327 struct wp_request wp; in ivpu_hw_btrs_wp_drive() local
338 pll_ratio_to_dpu_freq(vdev, wp.target) / HZ_PER_MHZ, wp.cfg, wp.epp, wp.cdyn); in ivpu_hw_btrs_wp_drive()
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/drivers/block/null_blk/
A Dzoned.c161 zone->wp = zone->start; in null_init_zoned_dev()
222 blkz.wp = zone->wp; in null_report_zones()
252 if (sector > zone->wp) in null_zone_valid_read_len()
275 if (zone->wp == zone->start) { in null_close_imp_open_zone()
383 sector = zone->wp; in null_zone_write()
387 if (sector != zone->wp || in null_zone_write()
431 zone->wp += nr_sectors; in null_zone_write()
542 if (zone->wp > zone->start) in null_close_zone()
548 if (zone->wp == zone->start) in null_close_zone()
638 zone->wp = zone->start; in null_reset_zone()
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/drivers/gpu/drm/i915/display/
A Dskl_watermark.c624 if (skl_needs_memory_bw_wa(display) && wp && wp->x_tiled) in skl_wm_latency()
1686 wp->width = width; in skl_compute_wm_params()
1688 wp->width /= 2; in skl_compute_wm_params()
1700 switch (wp->cpp) { in skl_compute_wm_params()
1721 wp->plane_bytes_per_line = wp->width * wp->cpp; in skl_compute_wm_params()
1722 if (wp->y_tiled) { in skl_compute_wm_params()
1744 wp->y_tile_minimum = mul_u32_fixed16(wp->y_min_scanlines, in skl_compute_wm_params()
1820 wp->cpp, latency, wp->dbuf_block_size); in skl_compute_plane_wm()
1826 if (wp->y_tiled) { in skl_compute_plane_wm()
1831 (wp->plane_bytes_per_line / wp->dbuf_block_size < 1)) { in skl_compute_plane_wm()
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/drivers/net/wireless/realtek/rtw88/
A Dpci.h154 static inline int avail_desc(u32 wp, u32 rp, u32 len) in avail_desc() argument
156 if (rp > wp) in avail_desc()
157 return rp - wp - 1; in avail_desc()
159 return len - wp + rp - 1; in avail_desc()
183 u32 wp; member
276 buf_desc = ring->r.head + ring->r.wp * size; in get_tx_buffer_desc()
A Dpci.c203 tx_ring->r.wp = 0; in rtw_pci_init_tx_ring()
293 rx_ring->r.wp = 0; in rtw_pci_init_rx_ring()
420 rtwpci->tx_rings[RTW_TX_QUEUE_BK].r.wp = 0; in rtw_pci_reset_buf_desc()
427 rtwpci->tx_rings[RTW_TX_QUEUE_BE].r.wp = 0; in rtw_pci_reset_buf_desc()
434 rtwpci->tx_rings[RTW_TX_QUEUE_VO].r.wp = 0; in rtw_pci_reset_buf_desc()
726 if (cur_rp == ring->r.wp) in __pci_flush_queue()
860 if (++ring->r.wp >= ring->r.len) in rtw_pci_tx_write_data()
861 ring->r.wp = 0; in rtw_pci_tx_write_data()
1033 if (cur_wp >= ring->r.wp) in rtw_pci_get_hw_rx_ring_nr()
1034 count = cur_wp - ring->r.wp; in rtw_pci_get_hw_rx_ring_nr()
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/drivers/media/pci/saa7164/
A Dsaa7164-core.c355 u32 wp, mcb, rp; in saa7164_work_enchandler() local
382 wp = saa7164_readl(port->bufcounter); in saa7164_work_enchandler()
389 if (wp == 0) in saa7164_work_enchandler()
392 mcb = wp - 1; in saa7164_work_enchandler()
431 u32 wp, mcb, rp; in saa7164_work_vbihandler() local
464 if (wp == 0) in saa7164_work_vbihandler()
467 mcb = wp - 1; in saa7164_work_vbihandler()
572 int wp, i = 0, rp; in saa7164_irq_ts() local
580 if (wp == 0) in saa7164_irq_ts()
583 rp = wp - 1; in saa7164_irq_ts()
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/drivers/block/
A Dzloop.c97 sector_t wp; member
177 zone->wp = zone->start; in zloop_update_seq_zone()
246 if (zone->wp == zone->start) in zloop_close_zone()
285 zone->wp = zone->start; in zloop_reset_zone()
410 sector = zone->wp; in zloop_rw()
418 if (sector != zone->wp || zone->wp + nr_sectors > zone_end) { in zloop_rw()
420 zone_no, sector, zone->wp); in zloop_rw()
435 zone->wp += nr_sectors; in zloop_rw()
436 if (zone->wp == zone_end) in zloop_rw()
678 blkz.wp = zone->wp; in zloop_report_zones()
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/drivers/bus/mhi/host/
A Dmain.c235 if (ring->wp < ring->rp) { in get_nr_avail_ring_elements()
254 ring->wp += ring->el_size; in mhi_add_ring_element()
256 ring->wp = ring->base; in mhi_add_ring_element()
551 ring->wp += ring->el_size; in mhi_recycle_ev_ring_element()
554 ring->wp = ring->base; in mhi_recycle_ev_ring_element()
694 if (tre_ring->wp != tre_ring->rp && in parse_xfer_event()
1122 void *tmp = ring->wp + ring->el_size; in mhi_is_ring_full()
1214 buf_info = buf_ring->wp; in mhi_gen_tre()
1222 buf_info->wp = tre_ring->wp; in mhi_gen_tre()
1237 mhi_tre = tre_ring->wp; in mhi_gen_tre()
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/drivers/dma/qcom/
A Dgpi.c461 void *wp; member
1339 if (ring->wp < ring->rp) { in gpi_ring_num_elements_avail()
1354 *wp = ring->wp; in gpi_ring_add_element()
1355 ring->wp += ring->el_size; in gpi_ring_add_element()
1357 ring->wp = ring->base; in gpi_ring_add_element()
1368 ring->wp += ring->el_size; in gpi_ring_recycle_ev_element()
1370 ring->wp = ring->base; in gpi_ring_recycle_ev_element()
1420 ring->wp = ring->base; in gpi_alloc_ring()
1454 *wp = ch_tre; in gpi_queue_xfer()
1862 void *tre, *wp = NULL; in gpi_issue_pending() local
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/drivers/net/wireless/realtek/rtlwifi/
A Dpci.h275 static inline u16 calc_fifo_space(u16 rp, u16 wp, u16 size) in calc_fifo_space() argument
277 if (rp <= wp) in calc_fifo_space()
278 return size - 1 + rp - wp; in calc_fifo_space()
279 return rp - wp - 1; in calc_fifo_space()

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