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Searched refs:wptr_cpu_addr (Results 1 – 25 of 33) sorted by relevance

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/drivers/gpu/drm/amd/amdgpu/
A Djpeg_v3_0.c452 return *ring->wptr_cpu_addr; in jpeg_v3_0_dec_ring_get_wptr()
469 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in jpeg_v3_0_dec_ring_set_wptr()
A Dvce_v4_0.c86 return *ring->wptr_cpu_addr; in vce_v4_0_ring_get_wptr()
109 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in vce_v4_0_ring_set_wptr()
180 *adev->vce.ring[0].wptr_cpu_addr = 0; in vce_v4_0_mmsch_start()
A Djpeg_v5_0_0.c538 return *ring->wptr_cpu_addr; in jpeg_v5_0_0_dec_ring_get_wptr()
555 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in jpeg_v5_0_0_dec_ring_set_wptr()
A Dvcn_v2_0.c1447 return *ring->wptr_cpu_addr; in vcn_v2_0_dec_ring_get_wptr()
1468 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in vcn_v2_0_dec_ring_set_wptr()
1676 return *ring->wptr_cpu_addr; in vcn_v2_0_enc_ring_get_wptr()
1681 return *ring->wptr_cpu_addr; in vcn_v2_0_enc_ring_get_wptr()
1700 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in vcn_v2_0_enc_ring_set_wptr()
1707 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in vcn_v2_0_enc_ring_set_wptr()
A Dvcn_v2_5.c1780 return *ring->wptr_cpu_addr; in vcn_v2_5_dec_ring_get_wptr()
1797 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in vcn_v2_5_dec_ring_set_wptr()
1865 return *ring->wptr_cpu_addr; in vcn_v2_5_enc_ring_get_wptr()
1870 return *ring->wptr_cpu_addr; in vcn_v2_5_enc_ring_get_wptr()
1889 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in vcn_v2_5_enc_ring_set_wptr()
1896 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in vcn_v2_5_enc_ring_set_wptr()
A Dvcn_v3_0.c1826 return *ring->wptr_cpu_addr; in vcn_v3_0_dec_ring_get_wptr()
1852 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in vcn_v3_0_dec_ring_set_wptr()
2082 return *ring->wptr_cpu_addr; in vcn_v3_0_enc_ring_get_wptr()
2087 return *ring->wptr_cpu_addr; in vcn_v3_0_enc_ring_get_wptr()
2106 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in vcn_v3_0_enc_ring_set_wptr()
2113 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in vcn_v3_0_enc_ring_set_wptr()
A Djpeg_v2_0.c434 return *ring->wptr_cpu_addr; in jpeg_v2_0_dec_ring_get_wptr()
451 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in jpeg_v2_0_dec_ring_set_wptr()
A Djpeg_v4_0.c612 return *ring->wptr_cpu_addr; in jpeg_v4_0_dec_ring_get_wptr()
629 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in jpeg_v4_0_dec_ring_set_wptr()
A Djpeg_v4_0_5.c628 return *ring->wptr_cpu_addr; in jpeg_v4_0_5_dec_ring_get_wptr()
645 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in jpeg_v4_0_5_dec_ring_set_wptr()
A Djpeg_v2_5.c461 return *ring->wptr_cpu_addr; in jpeg_v2_5_dec_ring_get_wptr()
478 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in jpeg_v2_5_dec_ring_set_wptr()
A Dsdma_v3_0.c367 wptr = *ring->wptr_cpu_addr >> 2; in sdma_v3_0_ring_get_wptr()
387 u32 *wb = (u32 *)ring->wptr_cpu_addr; in sdma_v3_0_ring_set_wptr()
392 u32 *wb = (u32 *)ring->wptr_cpu_addr; in sdma_v3_0_ring_set_wptr()
A Damdgpu_vpe.c703 wptr = atomic64_read((atomic64_t *)ring->wptr_cpu_addr); in vpe_ring_get_wptr()
728 atomic64_set((atomic64_t *)ring->wptr_cpu_addr, ring->wptr << 2); in vpe_ring_set_wptr()
A Duvd_v7_0.c121 return *ring->wptr_cpu_addr; in uvd_v7_0_enc_ring_get_wptr()
156 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in uvd_v7_0_enc_ring_set_wptr()
761 *adev->uvd.inst[i].ring_enc[0].wptr_cpu_addr = 0; in uvd_v7_0_mmsch_start()
A Dsdma_v4_0.c678 wptr = READ_ONCE(*((u64 *)ring->wptr_cpu_addr)); in sdma_v4_0_ring_get_wptr()
704 u64 *wb = (u64 *)ring->wptr_cpu_addr; in sdma_v4_0_ring_set_wptr()
747 wptr = READ_ONCE(*((u64 *)ring->wptr_cpu_addr)); in sdma_v4_0_page_ring_get_wptr()
769 u64 *wb = (u64 *)ring->wptr_cpu_addr; in sdma_v4_0_page_ring_set_wptr()
A Dmes_v11_0.c74 atomic64_set((atomic64_t *)ring->wptr_cpu_addr, in mes_v11_0_ring_set_wptr()
92 wptr = atomic64_read((atomic64_t *)ring->wptr_cpu_addr); in mes_v11_0_ring_get_wptr()
1273 *(ring->wptr_cpu_addr) = 0; in mes_v11_0_queue_init()
A Dmes_v12_0.c55 atomic64_set((atomic64_t *)ring->wptr_cpu_addr, in mes_v12_0_ring_set_wptr()
73 wptr = atomic64_read((atomic64_t *)ring->wptr_cpu_addr); in mes_v12_0_ring_get_wptr()
1365 *(ring->wptr_cpu_addr) = 0; in mes_v12_0_queue_init()
A Damdgpu_ring.h381 volatile u32 *wptr_cpu_addr; member
A Dvcn_v5_0_0.c1169 return *ring->wptr_cpu_addr; in vcn_v5_0_0_unified_ring_get_wptr()
1189 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in vcn_v5_0_0_unified_ring_set_wptr()
A Dvcn_v5_0_1.c1204 return *ring->wptr_cpu_addr; in vcn_v5_0_1_unified_ring_get_wptr()
1224 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in vcn_v5_0_1_unified_ring_set_wptr()
A Damdgpu_ring.c315 ring->wptr_cpu_addr = in amdgpu_ring_init()
A Dvcn_v4_0_5.c1442 return *ring->wptr_cpu_addr; in vcn_v4_0_5_unified_ring_get_wptr()
1462 *ring->wptr_cpu_addr = lower_32_bits(ring->wptr); in vcn_v4_0_5_unified_ring_set_wptr()
A Dsdma_v6_0.c192 wptr = READ_ONCE(*((u64 *)ring->wptr_cpu_addr)); in sdma_v6_0_ring_get_wptr()
219 atomic64_set((atomic64_t *)ring->wptr_cpu_addr, in sdma_v6_0_ring_set_wptr()
A Dsdma_v7_0.c192 wptr = READ_ONCE(*((u64 *)ring->wptr_cpu_addr)); in sdma_v7_0_ring_get_wptr()
221 atomic64_set((atomic64_t *)ring->wptr_cpu_addr, in sdma_v7_0_ring_set_wptr()
A Dgfx_v12_0.c3081 *ring->wptr_cpu_addr = 0; in gfx_v12_0_kgq_init_queue()
3412 atomic64_set((atomic64_t *)ring->wptr_cpu_addr, 0); in gfx_v12_0_kcq_init_queue()
4325 wptr = atomic64_read((atomic64_t *)ring->wptr_cpu_addr); in gfx_v12_0_ring_get_wptr_gfx()
4340 atomic64_set((atomic64_t *)ring->wptr_cpu_addr, in gfx_v12_0_ring_set_wptr_gfx()
4363 wptr = atomic64_read((atomic64_t *)ring->wptr_cpu_addr); in gfx_v12_0_ring_get_wptr_compute()
4375 atomic64_set((atomic64_t *)ring->wptr_cpu_addr, in gfx_v12_0_ring_set_wptr_compute()
A Dsdma_v5_2.c192 wptr = READ_ONCE(*((u64 *)ring->wptr_cpu_addr)); in sdma_v5_2_ring_get_wptr()
225 atomic64_set((atomic64_t *)ring->wptr_cpu_addr, in sdma_v5_2_ring_set_wptr()

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