| /drivers/gpu/drm/xe/ |
| A D | xe_mmio.h | 12 struct xe_reg;
19 u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg);
20 u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg);
21 void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val);
22 u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg);
23 u32 xe_mmio_rmw32(struct xe_mmio *mmio, struct xe_reg reg, u32 clr, u32 set);
24 int xe_mmio_write32_and_verify(struct xe_mmio *mmio, struct xe_reg reg, u32 val, u32 mask, u32 eval…
25 bool xe_mmio_in_range(const struct xe_mmio *mmio, const struct xe_mmio_range *range, struct xe_reg …
27 u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg);
28 int xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val,
[all …]
|
| A D | xe_oa_types.h | 81 struct xe_reg oa_head_ptr;
82 struct xe_reg oa_tail_ptr;
83 struct xe_reg oa_buffer;
84 struct xe_reg oa_ctx_ctrl;
85 struct xe_reg oa_ctrl;
86 struct xe_reg oa_debug;
87 struct xe_reg oa_status;
|
| A D | xe_gt_sriov_pf_service.c | 24 static const struct xe_reg tgl_runtime_regs[] = {
34 static const struct xe_reg ats_m_runtime_regs[] = {
45 static const struct xe_reg pvc_runtime_regs[] = {
56 static const struct xe_reg ver_1270_runtime_regs[] = {
69 static const struct xe_reg ver_2000_runtime_regs[] = {
85 static const struct xe_reg ver_3000_runtime_regs[] = {
104 const struct xe_reg *regs; in pick_runtime_regs()
135 const struct xe_reg *regs; in pf_alloc_runtime_info()
163 const struct xe_reg *regs, u32 *values) in read_many()
171 const struct xe_reg *regs; in pf_prepare_runtime_info()
[all …]
|
| A D | xe_mmio.c | 181 u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg) in xe_mmio_read8()
194 u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg) in xe_mmio_read16()
207 void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val) in xe_mmio_write32()
220 u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg) in xe_mmio_read32()
238 u32 xe_mmio_rmw32(struct xe_mmio *mmio, struct xe_reg reg, u32 clr, u32 set) in xe_mmio_rmw32()
250 struct xe_reg reg, u32 val, u32 mask, u32 eval) in xe_mmio_write32_and_verify()
262 struct xe_reg reg) in xe_mmio_in_range()
291 u64 xe_mmio_read64_2x32(struct xe_mmio *mmio, struct xe_reg reg) in xe_mmio_read64_2x32()
293 struct xe_reg reg_udw = { .addr = reg.addr + 0x4 }; in xe_mmio_read64_2x32()
319 static int __xe_mmio_wait32(struct xe_mmio *mmio, struct xe_reg reg, u32 mask, u32 val, in __xe_mmio_wait32()
[all …]
|
| A D | xe_gt_sriov_vf.h | 13 struct xe_reg;
34 u32 xe_gt_sriov_vf_read32(struct xe_gt *gt, struct xe_reg reg);
35 void xe_gt_sriov_vf_write32(struct xe_gt *gt, struct xe_reg reg, u32 val);
|
| A D | xe_gt_sriov_pf.c | 161 static struct xe_reg xe_reg_vf_to_pf(struct xe_reg vf_reg, unsigned int vfid, u32 stride) in xe_reg_vf_to_pf()
163 struct xe_reg pf_reg = vf_reg; in xe_reg_vf_to_pf()
174 struct xe_reg scratch; in pf_clear_vf_scratch_regs()
|
| A D | xe_gt_sriov_pf_service_types.h | 11 struct xe_reg;
32 const struct xe_reg *regs;
|
| A D | xe_gt_mcr.c | 51 static inline struct xe_reg to_xe_reg(struct xe_reg_mcr reg_mcr) in to_xe_reg()
567 const struct xe_reg reg = to_xe_reg(reg_mcr); in xe_gt_mcr_get_nonterminated_steering()
648 const struct xe_reg reg = to_xe_reg(reg_mcr); in rw_with_mcr_steering()
650 struct xe_reg steer_reg; in rw_with_mcr_steering()
715 const struct xe_reg reg = to_xe_reg(reg_mcr); in xe_gt_mcr_unicast_read_any()
794 struct xe_reg reg = to_xe_reg(reg_mcr); in xe_gt_mcr_multicast_write()
|
| A D | xe_force_wake_types.h | 61 struct xe_reg reg_ctl;
63 struct xe_reg reg_ack;
|
| A D | xe_hw_engine.h | 79 void xe_hw_engine_mmio_write32(struct xe_hw_engine *hwe, struct xe_reg reg, u32 val);
80 u32 xe_hw_engine_mmio_read32(struct xe_hw_engine *hwe, struct xe_reg reg);
|
| A D | xe_gt_topology.c | 20 const struct xe_reg regs[]) in load_dss_mask()
218 static const struct xe_reg geometry_regs[] = { in xe_gt_topology_init()
223 static const struct xe_reg compute_regs[] = { in xe_gt_topology_init()
|
| A D | xe_reg_sr.c | 124 static struct xe_reg_mcr to_xe_reg_mcr(const struct xe_reg reg) in to_xe_reg_mcr()
131 struct xe_reg reg = entry->reg; in apply_one_mmio()
|
| A D | xe_reg_sr_types.h | 15 struct xe_reg reg;
|
| A D | xe_hwmon.c | 215 static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg hwmon_reg, in xe_hwmon_get_reg()
291 struct xe_reg rapl_limit, pkg_power_sku; in xe_hwmon_power_max_read()
334 struct xe_reg rapl_limit; in xe_hwmon_power_max_write()
419 struct xe_reg reg = xe_hwmon_get_reg(hwmon, REG_PKG_POWER_SKU, channel); in xe_hwmon_power_rated_max_read()
655 struct xe_reg rapl_limit; in xe_hwmon_attributes_visible()
825 struct xe_reg reg; in xe_hwmon_power_is_visible()
1235 struct xe_reg pkg_power_sku_unit; in xe_hwmon_get_preregistration_info()
|
| A D | xe_guc_capture_types.h | 31 struct xe_reg reg;
|
| A D | xe_force_wake.c | 32 struct xe_reg reg, struct xe_reg ack) in init_domain()
|
| A D | xe_guc_types.h | 118 struct xe_reg notify_reg;
|
| A D | xe_rtp_types.h | 24 struct xe_reg reg;
|
| A D | xe_huc.c | 217 struct xe_reg reg;
|
| A D | xe_hw_engine.c | 297 struct xe_reg reg, u32 val) in xe_hw_engine_mmio_write32()
317 u32 xe_hw_engine_mmio_read32(struct xe_hw_engine *hwe, struct xe_reg reg) in xe_hw_engine_mmio_read32()
|
| A D | xe_guc_ads.c | 727 struct xe_reg reg, in guc_mmio_regset_write_one()
763 struct xe_reg reg; in guc_mmio_regset_write()
|
| A D | xe_gt_sriov_vf.c | 966 u32 xe_gt_sriov_vf_read32(struct xe_gt *gt, struct xe_reg reg) in xe_gt_sriov_vf_read32()
1001 void xe_gt_sriov_vf_write32(struct xe_gt *gt, struct xe_reg reg, u32 val) in xe_gt_sriov_vf_write32()
|
| /drivers/gpu/drm/xe/compat-i915-headers/ |
| A D | intel_uncore.h | 30 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_read()
38 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_read8()
46 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_read16()
73 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_posting_read()
81 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_write()
89 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_rmw()
98 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_wait_for_register()
109 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_wait_for_register_fw()
120 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in __intel_wait_for_register()
139 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_read_fw()
[all …]
|
| /drivers/gpu/drm/xe/regs/ |
| A D | xe_reg_defs.h | 32 struct xe_reg { struct
61 static_assert(sizeof(struct xe_reg) == sizeof(u32));
72 struct xe_reg __reg;
120 #define XE_REG(r_, ...) ((const struct xe_reg)XE_REG_INITIALIZER(r_, ##__VA_ARGS__))
132 static inline bool xe_reg_is_valid(struct xe_reg r) in xe_reg_is_valid()
|
| /drivers/gpu/drm/xe/display/ |
| A D | xe_plane_initial.c | 32 struct xe_reg pipe_frmtmstmp = XE_REG(i915_mmio_reg_offset(PIPE_FRMTMSTMP(crtc->pipe))); in intel_plane_initial_vblank_wait()
|