Home
last modified time | relevance | path

Searched refs:zstate_support (Results 1 – 16 of 16) sorted by relevance

/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
A Ddcn31_clk_mgr.c155 if (new_clocks->zstate_support != DCN_ZSTATE_SUPPORT_DISALLOW && in dcn31_update_clocks()
156 new_clocks->zstate_support != clk_mgr_base->clks.zstate_support) { in dcn31_update_clocks()
157 dcn31_smu_set_zstate_support(clk_mgr, new_clocks->zstate_support); in dcn31_update_clocks()
159 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn31_update_clocks()
181 if (new_clocks->zstate_support == DCN_ZSTATE_SUPPORT_DISALLOW && in dcn31_update_clocks()
182 new_clocks->zstate_support != clk_mgr_base->clks.zstate_support) { in dcn31_update_clocks()
185 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn31_update_clocks()
307 clk_mgr->clks.zstate_support = DCN_ZSTATE_SUPPORT_UNKNOWN; in dcn31_init_clocks()
321 else if (a->zstate_support != b->zstate_support) in dcn31_are_clock_states_equal()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
A Ddcn314_clk_mgr.c195 clk_mgr->clks.zstate_support = DCN_ZSTATE_SUPPORT_UNKNOWN; in dcn314_init_clocks()
226 if (new_clocks->zstate_support != DCN_ZSTATE_SUPPORT_DISALLOW && in dcn314_update_clocks()
227 new_clocks->zstate_support != clk_mgr_base->clks.zstate_support) { in dcn314_update_clocks()
228 dcn314_smu_set_zstate_support(clk_mgr, new_clocks->zstate_support); in dcn314_update_clocks()
230 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn314_update_clocks()
252 if (new_clocks->zstate_support == DCN_ZSTATE_SUPPORT_DISALLOW && in dcn314_update_clocks()
253 new_clocks->zstate_support != clk_mgr_base->clks.zstate_support) { in dcn314_update_clocks()
256 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn314_update_clocks()
380 else if (a->zstate_support != b->zstate_support) in dcn314_are_clock_states_equal()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
A Ddcn35_clk_mgr.c403 if (new_clocks->zstate_support != DCN_ZSTATE_SUPPORT_DISALLOW && in dcn35_update_clocks()
404 new_clocks->zstate_support != clk_mgr_base->clks.zstate_support) { in dcn35_update_clocks()
405 dcn35_smu_set_zstate_support(clk_mgr, new_clocks->zstate_support); in dcn35_update_clocks()
407 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn35_update_clocks()
423 if (new_clocks->zstate_support == DCN_ZSTATE_SUPPORT_DISALLOW && in dcn35_update_clocks()
424 new_clocks->zstate_support != clk_mgr_base->clks.zstate_support) { in dcn35_update_clocks()
427 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn35_update_clocks()
582 else if (a->zstate_support != b->zstate_support) in dcn35_are_clock_states_equal()
620 clk_mgr->clks.zstate_support = DCN_ZSTATE_SUPPORT_UNKNOWN; in init_clk_states()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
A Ddcn315_clk_mgr.c141 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn315_update_clocks()
146 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn315_update_clocks()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
A Ddcn316_clk_mgr.c155 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn316_update_clocks()
/drivers/gpu/drm/amd/display/dc/
A Ddc.h312 bool zstate_support; member
662 enum dcn_zstate_support_state zstate_support; member
/drivers/gpu/drm/amd/display/dc/dml/dcn351/
A Ddcn351_fpu.c638 context->bw_ctx.bw.dcn.clk.zstate_support = support; in dcn351_decide_zstate_support()
/drivers/gpu/drm/amd/display/dc/dml/dcn35/
A Ddcn35_fpu.c617 context->bw_ctx.bw.dcn.clk.zstate_support = support; in dcn35_decide_zstate_support()
/drivers/gpu/drm/amd/display/dc/resource/dcn314/
A Ddcn314_resource.c1853 dc->caps.zstate_support = true; in dcn314_resource_construct()
/drivers/gpu/drm/amd/display/dc/resource/dcn31/
A Ddcn31_resource.c1923 dc->caps.zstate_support = true; in dcn31_resource_construct()
/drivers/gpu/drm/amd/display/dc/resource/dcn35/
A Ddcn35_resource.c1860 dc->caps.zstate_support = true; in dcn35_resource_construct()
/drivers/gpu/drm/amd/display/dc/resource/dcn351/
A Ddcn351_resource.c1832 dc->caps.zstate_support = true; in dcn351_resource_construct()
/drivers/gpu/drm/amd/display/dc/resource/dcn36/
A Ddcn36_resource.c1833 dc->caps.zstate_support = true; in dcn36_resource_construct()
/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddcn20_fpu.c1250 context->bw_ctx.bw.dcn.clk.zstate_support = decide_zstate_support(dc, context); in dcn20_calculate_dlg_params()
/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
A Ddcn401_hwseq.c1451 if (context->bw_ctx.bw.dcn.clk.zstate_support == DCN_ZSTATE_SUPPORT_ALLOW) { in dcn401_optimize_bandwidth()
/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
A Ddcn20_hwseq.c2464 if (context->bw_ctx.bw.dcn.clk.zstate_support == DCN_ZSTATE_SUPPORT_ALLOW && in dcn20_optimize_bandwidth()

Completed in 69 milliseconds