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Searched refs:CLK_TOP_SYSPLL1_D2 (Results 1 – 10 of 10) sorted by relevance

/include/dt-bindings/clock/
A Dmediatek,mt6735-topckgen.h15 #define CLK_TOP_SYSPLL1_D2 8 macro
A Dmt7629-clk.h35 #define CLK_TOP_SYSPLL1_D2 25 macro
A Dmt7622-clk.h31 #define CLK_TOP_SYSPLL1_D2 19 macro
A Dmediatek,mt6795-clk.h52 #define CLK_TOP_SYSPLL1_D2 41 macro
A Dmt6797-clk.h47 #define CLK_TOP_SYSPLL1_D2 37 macro
A Dmt6765-clk.h37 #define CLK_TOP_SYSPLL1_D2 2 macro
A Dmt8173-clk.h54 #define CLK_TOP_SYSPLL1_D2 44 macro
A Dmediatek,mt8365-clk.h17 #define CLK_TOP_SYSPLL1_D2 7 macro
A Dmt2712-clk.h37 #define CLK_TOP_SYSPLL1_D2 6 macro
A Dmt2701-clk.h16 #define CLK_TOP_SYSPLL1_D2 6 macro

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