Searched refs:tx_offset (Results 1 – 4 of 4) sorted by relevance
58 regmap_write(i2s->regmap, TEGRA210_I2S_TX_SLOT_CTRL + i2s->soc_data->tx_offset, in tegra210_i2s_set_slot_ctrl()117 reset_reg = TEGRA210_I2S_TX_SOFT_RESET + i2s->soc_data->tx_offset; in tegra210_i2s_sw_reset()118 cif_reg = TEGRA210_I2S_TX_CIF_CTRL + i2s->soc_data->tx_offset; in tegra210_i2s_sw_reset()119 stream_reg = TEGRA210_I2S_TX_CTRL + i2s->soc_data->tx_offset; in tegra210_i2s_sw_reset()160 } else if (w->reg == (TEGRA210_I2S_TX_ENABLE + i2s->soc_data->tx_offset)) { in tegra210_i2s_init()162 status_reg = TEGRA210_I2S_TX_STATUS + i2s->soc_data->tx_offset; in tegra210_i2s_init()213 regmap_update_bits(i2s->regmap, TEGRA210_I2S_TX_CTRL + i2s->soc_data->tx_offset, in tegra210_i2s_set_data_offset()712 reg = TEGRA210_I2S_TX_CIF_CTRL + i2s->soc_data->tx_offset; in tegra210_i2s_hw_params()1134 .tx_offset = TEGRA210_I2S_TX_OFFSET,1145 .tx_offset = TEGRA264_I2S_TX_OFFSET,
153 unsigned int tx_offset; member
16 offset += dice->tx_offset; in get_subaddr()329 dice->tx_offset = be32_to_cpu(pointers[2]) * 4; in get_subaddrs()
84 unsigned int tx_offset; member
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