Searched refs:ARM64_FEATURE_MASK (Results 1 – 8 of 8) sorted by relevance
| /tools/testing/selftests/kvm/arm64/ |
| A D | no-vgic-v3.c | 57 __GUEST_ASSERT(FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_GIC), in guest_code()
168 __TEST_REQUIRE(FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_GIC), pfr0), in main()
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| A D | debug-exceptions.c | 119 brps = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_BRPs), dfr0); in GEN_DEBUG_WRITE_REG()
124 wrps = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_WRPs), dfr0); in GEN_DEBUG_WRITE_REG()
421 return FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_DebugVer), id_aa64dfr0); in debug_version()
542 brp_num = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_BRPs), aa64dfr0) + 1; in test_guest_debug_exceptions_all()
546 wrp_num = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_WRPs), aa64dfr0) + 1; in test_guest_debug_exceptions_all()
549 ctx_brp_num = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_CTX_CMPs), aa64dfr0) + 1; in test_guest_debug_exceptions_all()
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| A D | aarch32_id_regs.c | 149 el0 = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_EL0), val); in vcpu_aarch64_only()
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| A D | set_id_regs.c | 597 mte = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE), val); in test_user_set_mte_reg()
598 mte_frac = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE_frac), val); in test_user_set_mte_reg()
615 mte_frac = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE_frac), val); in test_user_set_mte_reg()
777 el0 = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_EL0), val); in main()
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| A D | page_fault_test.c | 98 atomic = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64ISAR0_EL1_ATOMIC), isar0); in guest_check_lse()
105 uint64_t dzp = FIELD_GET(ARM64_FEATURE_MASK(DCZID_EL0_DZP), dczid); in guest_check_dc_zva()
198 hadbs = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64MMFR1_EL1_HAFDBS), mmfr1); in guest_set_ha()
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| A D | vpmu_counter_access.c | 444 pmuver = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer), dfr0); in create_vpmu_vm()
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| /tools/testing/selftests/kvm/lib/arm64/ |
| A D | processor.c | 576 gran = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64MMFR0_EL1_TGRAN4), val); in aarch64_get_supported_page_sizes()
580 gran = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64MMFR0_EL1_TGRAN64), val); in aarch64_get_supported_page_sizes()
584 gran = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64MMFR0_EL1_TGRAN16), val); in aarch64_get_supported_page_sizes()
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| /tools/arch/arm64/include/asm/ |
| A D | sysreg.h | 1084 #define ARM64_FEATURE_MASK(x) (x##_MASK) macro
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