Searched refs:cache_hit_st (Results 1 – 2 of 2) sorted by relevance

/tools/arch/x86/include/asm/amd/
A D	ibs.h	100 cache_hit_st:1, /* 5: cache hit state */ member
/tools/perf/util/
A D	amd-sample-raw.c	132 (reg.cache_hit_st ? "CacheHitSt 1=O-State " : "CacheHitSt 0=M-state ") : "", in pr_ibs_op_data2_extended() 151 reg.data_src_lo == 2 ? (reg.cache_hit_st ? "CacheHitSt 1=O-State " in pr_ibs_op_data2_default()

Completed in 6 milliseconds

Last Index update Fri Aug 22 10:33:58 CST 2025