| /tools/scripts/ |
| A D | utilities.mak | 12 # This is used as the common way to specify 14 # newlines; the default is a bizarre string. 27 # The only solution is to change each newline into 47 # the default escape is a bizarre string. 63 # the default escape is a bizarre string. 82 # This function produces text that is suitable for 131 # is-absolute 133 # Usage: bool-value = $(call is-absolute,path) 147 # is-executable 149 # Usage: bool-value = $(call is-executable,path) [all …]
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| /tools/testing/vsock/ |
| A D | README | 17 4. Boot the guest and ensure that the AF_VSOCK transport is enabled. 40 however, is deferred to Kernel Memory Leak Detector. It is recommended to enable 56 'vsock_perf' is a simple tool to measure vsock performance. It works in 58 starts data transmission to the receiver. After data processing is done, 63 # connect to CID 2, port 1234, send 1G of data, tx buf size is 1M 70 A is calculated as "number of bits to send" / "time in tx loop" 73 # listen port 1234, rx buf size is 1M, socket buf size is 1G, SO_RCVLOWAT is 64K 83 A is calculated as "number of received bits" / "time in rx loop". 84 B is time, spent in 'read()' system call(excluding 'poll()') 85 C is number of 'poll()' wake ups with POLLIN bit set. [all …]
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| /tools/perf/Documentation/ |
| A D | intel-hybrid.txt | 5 For some Intel platforms, such as AlderLake, which is hybrid platform and 34 the event is belong to. Same event name but with different pmu can 52 two events are created automatically. One is for atom, the other is for 60 type. The PMU type ID is stored at attr.config[63:32]. 62 PMU type ID is retrieved from sysfs. 72 Cache event is similar. The type PERF_TYPE_HW_CACHE is extended to be 73 PMU aware type. The PMU type ID is stored at attr.config[63:32]. 111 type 0 is PERF_TYPE_HARDWARE. 125 The first 'cycles' is core event, the second 'cycles' is atom event. 133 scaled value for core cycles is 160,444,092 and the percentage is 0.47%. [all …]
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| A D | perf-config.txt | 317 Default is true. This option is only applied to TUI. 335 Default is 'false'. 355 Default is 'false'. 371 Default is 'false'. 386 Default is 'false'. 490 If this option is not set and report.children or top.children is 505 control the threshold. Default is 0.5 (%). The overhead is calculated 564 This is identical to 'call-graph.record-mode', except it is 586 '--slab' nor '--page' option is used. Default is 'slab'. 598 This is identical to 'call-graph.record-mode', except it is [all …]
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| A D | perf-kwork.txt | 92 Input file name. (default: perf.data unless stdin is a fifo) 108 have the format seconds.microseconds. If start is not given (i.e., time 109 string is ',x.y') then analysis starts at the beginning of the file. If 110 stop time is not given (i.e, time string is 'x.y,') then analysis goes 126 Input file name. (default: perf.data unless stdin is a fifo) 138 have the format seconds.microseconds. If start is not given (i.e., time 140 stop time is not given (i.e, time string is 'x.y,') then analysis goes 156 Input file name. (default: perf.data unless stdin is a fifo) 179 stop time is not given (i.e, time string is 'x.y,') then analysis goes 195 Input file name. (default: perf.data unless stdin is a fifo) [all …]
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| A D | jitdump-specification.txt | 21 The format of the file is binary. It is self-describing in terms of endianness and is portable acro… 31 Each entry in the file is timestamped. All timestamps must use the same clock source. The CLOCK_MON… 55 The record header is specified in order as follows: 82 The record header total_size field is inclusive of all components: 89 …is used to uniquely identify each jitted function. The index can be a monotonically increasing 64-… 96 The record type is optional. 117 The record type is optional. 129 * uint32_t discrim : column discriminator, 0 is default 142 The record type is optional. 152 The record type is optional. [all …]
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| A D | perf-help.txt | 19 If the option '--all' or '-a' is given, then all available commands are 22 If a perf command is named, a manual page for that command is brought 23 up. The 'man' program is used by default for this purpose, but this 26 Note that `perf --help ...` is identical to `perf help ...` because the 27 former is internally converted into the latter.
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| A D | intel-bts.txt | 9 notable difference is that Intel BTS has no timing information and as a 10 consequence the present implementation is limited to per-thread recording. 13 code is still needed to pair up calls and returns correctly, consequently much 28 option is: 32 Currently Intel BTS is limited to per-thread tracing so the --per-thread option 33 is also needed. 39 The snapshot option is the same as Intel PT (refer Intel PT documentation). 45 The mmap size option is the same as Intel PT (refer Intel PT documentation). 52 This can be further controlled by option --itrace. The --itrace option is 66 When -D is used, Intel BTS packets are displayed. [all …]
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| A D | callchain-overhead-calculation.txt | 5 wall-clock overhead). The 'self' overhead is simply calculated by 7 This is the value that perf shows traditionally and sum of all the 10 The 'children' overhead is calculated by adding all period values of 17 values exceeds 100% since each of them is already an accumulation of 40 In this case 'foo' is a child of 'bar', and 'bar' is an immediate 41 child of 'main' so 'foo' also is a child of 'main'. In other words, 42 'main' is a parent of 'foo' and 'bar', and 'bar' is a parent of 'foo'. 65 When the --children option is enabled, the 'self' overhead values of 105 Since v3.16 the 'children' overhead is shown by default and the output 106 is sorted by its values. The 'children' overhead is disabled by
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| A D | perf-intel-pt.txt | 57 It is important to start small. That is because it is easy to capture vastly 73 --kcore is used, but access to /proc/kcore is restricted e.g. 262 is the same as: 287 perf_event_attr is displayed if the -vv option is used e.g. 389 If decoding is expected to be reliable and the buffer is large 440 that is supported (0 is always supported). 503 is executed. 606 is the same as: 625 sample size is limited by the maximum event size which is 64KiB. It is 655 The snapshot size is displayed if the option -vv is used e.g. [all …]
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| A D | perf-probe.txt | 45 or lines. If a path of module file is passed, perf-probe 87 syntax is same as PROBE SYNTAX, but NO ARGs. 144 Demangle application symbols. --no-demangle is also available 177 …is also possible to specify a probe point by the source line number or lazy matching by using 'SRC… 179 'SDTEVENT' and 'PROVIDER' is the pre-defined event name which is defined by user SDT (Statically De… 191 See EXAMPLES how it is used. 202 On x86 systems %REG is always the short form of the register: for example %AX. %RAX or %EAX is not … 203 "@user" is a special attribute which means the LOCALVAR will be treated as a user-space memory. Thi… 209 Bitfield is another special type, which takes 3 parameters, bit-width, bit-offset, and container-si… 215 Line range is described by following syntax. [all …]
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| A D | perf-arm-spe.txt | 27 5. Interrupt when the buffer is full 32 This is chosen from a sample population, for SPE this is an IMPLEMENTATION DEFINED choice of all 35 sample. This minimum interval is used by the driver if no interval is specified. A pseudo-random 36 perturbation is also added to the sampling interval by default. 42 Sampling ensures there is only one sampled operation is in flight. 53 The record is appended to a memory buffer 55 Interrupt when the buffer is full 75 hardware. Only one sampled operation is in flight at a time. 123 The SPE interrupt must also be described by the firmware. If the module is loaded and KPTI is 135 The sample period is set from the -c option, and because the minimum interval is used by default [all …]
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| A D | perf-record.txt | 61 The default is 1. 140 <file name> is the name of the object file, <start> is the offset to the 144 If no object file is specified then the kernel is assumed, in which case 153 omitted and <start> is a symbol, then the size is calculated to the end 156 If <size> is omitted and <start> is '*', then the start and size will 314 main limitation is that it is only available on new Intel 494 inheritance is automatically disabled. --per-thread is ignored with a warning 509 is off by default. It is possible to select the registers to sample using their 538 In Snapshot Mode trace data is captured only when signal SIGUSR2 is received 698 record is finished. [all …]
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| /tools/memory-model/litmus-tests/ |
| A D | README | 6 Test of read-read coherence, that is, whether or not two 10 Test of read-write coherence, that is, whether or not a read 20 Test of write-write coherence, that is, whether or not two 42 S is otherwise known as ISA2. 144 The second is forbidden because smp_store_release() is 177 The end of the name is ".litmus". 216 P0()'s WRITE_ONCE() is read by its first READ_ONCE(), which is a 229 The resulting descriptor is "PodRR". Because P0()'s third access is 233 access, and the resulting descriptor is "Fre". P1()'s first access is 235 thus far is thus "Rfi Once PodRR Once Fre Once". [all …]
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| A D | WRC+pooncerelease+fencermbonceonce+Once.litmus | 6 * This litmus test is an extension of the message-passing pattern, where 7 * the first write is moved to a separate process. Because it features 9 * specifically, this litmus test is forbidden because smp_store_release() 10 * is A-cumulative in LKMM.
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| /tools/perf/pmu-events/ |
| A D | README | 5 The main program in this directory, is the 'jevents', which is built and 6 executed _BEFORE_ the perf binary itself is built. 23 folder. Matching is based on the "EventName" field. 46 is derived from JSON file name, 'power8.json'). 75 After the 'pmu-events.c' is generated, it is compiled and the resulting 76 'pmu-events.o' is added to 'libperf.a' which is then used to build perf. 95 where 'pm_1plus_ppc_cmpl' is a Power8 PMU event. 103 It is required even if such mapping is 1:1. 105 The mapfile.csv format is expected to be: 121 The header line is the first line in the file, which is [all …]
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| /tools/testing/kunit/test_data/ |
| A D | test_is_test_passed-no_tests_run_no_header.log | 5 Checking if /dev/shm is on tmpfs...OK 39 Using a channel type which is configured out of UML 41 Using a channel type which is configured out of UML 43 Using a channel type which is configured out of UML 45 Using a channel type which is configured out of UML 47 Using a channel type which is configured out of UML 49 Using a channel type which is configured out of UML 51 Using a channel type which is configured out of UML 53 Using a channel type which is configured out of UML 55 Using a channel type which is configured out of UML [all …]
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| A D | test_output_isolated_correctly.log | 61 Using a channel type which is configured out of UML 63 Using a channel type which is configured out of UML 65 Using a channel type which is configured out of UML 67 Using a channel type which is configured out of UML 69 Using a channel type which is configured out of UML 71 Using a channel type which is configured out of UML 73 Using a channel type which is configured out of UML 75 Using a channel type which is configured out of UML 77 Using a channel type which is configured out of UML 79 Using a channel type which is configured out of UML [all …]
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| /tools/testing/selftests/net/packetdrill/ |
| A D | tcp_zerocopy_epoll_oneshot.pkt | 4 // This is a test to confirm that EPOLLERR is only fired once for an FD when 5 // EPOLLONESHOT is set. 8 // is correctly fired only once, when EPOLLONESHOT is set. send another packet 9 // with MSG_ZEROCOPY. confirm that EPOLLERR is not fired. Rearm the FD and 10 // confirm that EPOLLERR is correctly set. 49 // rearm the FD and verify the EPOLLERR is fired again.
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| A D | tcp_zerocopy_epoll_exclusive.pkt | 4 // EPOLLERR is known to be not edge-triggered unlike EPOLLIN and EPOLLOUT but 5 // it is not level-triggered either. this tests verify that the same behavior is 9 // is correctly fired only once, when EPOLLET is set. send another packet with 10 // MSG_ZEROCOPY. confirm that EPOLLERR is correctly fired again only once.
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| /tools/memory-model/Documentation/ |
| A D | recipes.txt | 15 there is only one CPU or only one memory location is accessed, and the 28 called is not defined; the object code is allowed to use either 252 pointers. The general approach is shown below: 288 that is expanded as additional primes are needed. 442 It is tempting to assume that CPU0()'s store to x is globally ordered 466 of z is 2, then the final value of r1 must also be 1, but it really is 468 is that in this version, CPU2() is not part of the release-acquire chain. 518 On CPU0, the store is to @cond and the load is in waitqueue_active(). 531 needed in which situations, but this is not the case. There is a pattern 538 relation is called "reads-from" and is usually abbreviated "rf". [all …]
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| A D | glossary.txt | 2 glossaries, it is not intended to be read front to back (except perhaps 18 In this case, because the address of "p->a" on line 3 is computed 31 An example special acquire operation is smp_load_acquire(), 44 there is said to be a coherence link from the second CPU to 48 is a "coherence internal" (coi) link. The term "coherence 49 external" (coe) link is used when it is necessary to exclude 84 are all equal to zero is forbidden by LKMM. 112 external" (fre) link is used when it is necessary to exclude 144 CPU, there is said to be a reads-from link from the second 152 is a "reads-from internal" (rfi) link. The term "reads-from [all …]
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| A D | control-dependencies.txt | 4 A major difficulty with control dependencies is that current compilers 5 do not support them. One purpose of this document is therefore to 11 One such challenge is that control dependencies order only later stores. 13 unless a read memory barrier is provided. Consider the following code: 19 This is not guaranteed to provide any ordering because some types of CPUs 31 However, stores are not speculated. This means that ordering is 49 "a" is always non-zero, it would be well within its rights to optimize 59 It is tempting to try use control dependencies to enforce ordering on 89 conditional is absolutely required, and must be present in the final 146 make sure that MAX is greater than one, perhaps as follows: [all …]
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| /tools/tracing/rtla/ |
| A D | Makefile.config | 20 $(info libtraceevent version is too low, it must be at least $(LIBTRACEEVENT_MIN_VERSION)) 27 $(info libtraceevent is missing. Please install libtraceevent-dev/libtraceevent-devel) 36 $(info libtracefs version is too low, it must be at least $(LIBTRACEFS_MIN_VERSION)) 43 $(info libtracefs is missing. Please install libtracefs-dev/libtracefs-devel) 52 $(info libcpupower is missing, building without --deepest-idle-state support.) 70 $(info libbpf is missing, building without BPF skeleton support.) 79 $(info clang is missing or does not support BPF CO-RE, building without BPF skeleton support.) 88 $(info bpftool is missing or not supporting skeletons, building without BPF skeleton support.)
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| /tools/perf/ |
| A D | design.txt | 35 When creating a new counter fd, 'perf_event_attr' is: 72 is divided into 3 bit-fields: 83 this is, with the following encoding: 153 counters. A "counting" counter is one that is used for counting the 177 A "sampling" counter is one that is set up to generate an interrupt 226 CPU is in user, kernel and/or hypervisor mode. 243 pid == 0: if the pid parameter is zero, the counter is attached to the 274 (A single counter on its own is created with group_fd = -1 and is 277 A counter group is scheduled onto the CPU as a unit, that is, it will 291 as where the ring-buffer head is. [all …]
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