Searched refs:levels (Results 1 – 20 of 20) sorted by relevance
| /tools/power/x86/intel-speed-select/ |
| A D | isst-core.c | 204 if (level > pkg_dev.levels) { in isst_get_pbf_info()
244 if (level > pkg_dev.levels) { in isst_get_fact_info()
351 for (i = 0; i < pkg_dev->levels; ++i) { in isst_get_process_ctdp_complete()
381 pkg_dev->levels); in isst_get_process_ctdp()
383 if (tdp_level != 0xff && tdp_level > pkg_dev->levels) { in isst_get_process_ctdp()
391 for (i = 0; i <= pkg_dev->levels; ++i) { in isst_get_process_ctdp()
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| A D | isst-config.c | 1160 if (*max_level < pkg_dev.levels) in get_isst_status()
1161 *max_level = pkg_dev.levels; in get_isst_status()
1163 for (j = 0; j <= pkg_dev.levels; ++j) { in get_isst_status()
1292 _get_tdp_level("get-config-levels", levels, levels, "Max TDP level", NULL, NULL);
1293 _get_tdp_level("get-config-version", levels, version, "TDP version", NULL, NULL);
1294 _get_tdp_level("get-config-enabled", levels, enabled, "perf-profile enable status", "disabled", "en…
1295 _get_tdp_level("get-config-current_level", levels, current_level,
1297 _get_tdp_level("get-lock-status", levels, locked, "TDP lock status", "unlocked", "locked");
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| A D | isst.h | 178 int levels; member
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| A D | isst-core-mbox.c | 245 pkg_dev->levels = 0; in mbox_get_config_levels()
256 pkg_dev->levels = (resp >> 8) & 0xff; in mbox_get_config_levels()
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| A D | isst-core-tpmi.c | 165 pkg_dev->levels = info.max_level; in tpmi_get_config_levels()
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| A D | isst-display.c | 369 for (i = 0; i <= pkg_dev->levels; ++i) { in isst_ctdp_display_information()
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| /tools/perf/Documentation/ |
| A D | cpu-and-latency-overheads.txt | 82 To see the normal function-level profile for particular parallelism levels
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| A D | perf-top.txt | 254 The privilege levels may be omitted, in which case, the privilege levels of the associated
256 levels are subject to permissions. When sampling on multiple events, branch stack sampling
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| A D | tips.txt | 67 To analyze particular parallelism levels, try: perf report --latency --parallelism=32-64
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| A D | perf-script-python.txt | 251 levels if they don't exist e.g syscalls[comm][pid][id] = 1 will create
252 the intermediate hash levels and finally assign the value 1 to the
601 without having to go to the trouble of creating intermediate levels if
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| A D | perf-record.txt | 469 The privilege levels may be omitted, in which case, the privilege levels of the associated
471 levels are subject to permissions. When sampling on multiple events, branch stack sampling
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| A D | topdown.txt | 6 bound, and backend bound. Higher levels provide more detail in to the
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| A D | perf-list.txt | 91 Unlike Intel PEBS which provides levels of precision, AMD core pmu is
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| A D | perf-report.txt | 72 Only consider these parallelism levels. Parallelism level is the number
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| A D | perf-stat.txt | 521 As the higher levels gather more metrics and use more counters they
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| /tools/usb/ |
| A D | ffs-test.c | 67 static const char levels[8][6] = { in _msg() local
79 fprintf(stderr, "%s: %s ", argv0, levels[level]); in _msg()
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| /tools/net/sunrpc/xdrgen/ |
| A D | README | 17 is needed to help ensure proper levels of security. Bugs in this
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| /tools/memory-model/Documentation/ |
| A D | control-dependencies.txt | 74 optimization levels:
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| /tools/arch/x86/kcpuid/ |
| A D | cpuid.csv | 331 …1:0, eax, 4:0, x2apic_id_shift , Bit width of this level (previous levels inclusive)
577 …5:0, eax, 4:0, x2apic_id_shift , Bit width of this level (previous levels inclusive)
983 0x8000001f, 0, ebx, 15:12, vmpl_count , Number of VM permission levels (V…
1057 …3:0, eax, 4:0, x2apic_id_shift , Bit width of this level (previous levels inclusive)
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| /tools/perf/ |
| A D | design.txt | 117 cache references and misses at different levels of the cache hierarchy).
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