Searched refs:orders (Results 1 – 11 of 11) sorted by relevance
203 unsigned long orders = thp_supported_orders(); in thp_read_settings() local230 if (!((1 << i) & orders)) { in thp_read_settings()255 unsigned long orders = thp_supported_orders(); in thp_write_settings() local281 if (!((1 << i) & orders)) in thp_write_settings()352 unsigned long orders = 0; in __thp_supported_orders() local369 orders |= 1UL << i; in __thp_supported_orders()372 return orders; in __thp_supported_orders()
30 unsigned long orders; in detect_thp_sizes() local38 orders = thp_supported_orders(); in detect_thp_sizes()40 for (i = 0; orders && count < max; i++) { in detect_thp_sizes()41 if (!(orders & (1UL << i))) in detect_thp_sizes()43 orders &= ~(1UL << i); in detect_thp_sizes()
52 unsigned long orders; in detect_thp_sizes() local60 orders = 1UL << sz2ord(pmdsize); in detect_thp_sizes()61 orders |= thp_supported_orders(); in detect_thp_sizes()63 for (i = 0; orders && count < max; i++) { in detect_thp_sizes()64 if (!(orders & (1UL << i))) in detect_thp_sizes()66 orders &= ~(1UL << i); in detect_thp_sizes()
29 a special operation that includes a load and which orders that117 Fully Ordered: An operation such as smp_mb() that orders all of120 that orders all of its CPU's prior accesses, itself, and167 a special operation that includes a store and which orders that
236 The smp_store_release() macro orders any prior accesses against the237 store, while the smp_load_acquire macro orders the load against any277 smp_store_release(), but the rcu_dereference() macro orders the load only314 The smp_wmb() macro orders prior stores against later stores, and the315 smp_rmb() macro orders prior loads against later loads. Therefore, if
11 1. Barriers (also known as "fences"). A barrier orders some or67 First, the smp_mb() full memory barrier orders all of the CPU's prior115 synchronize_srcu() and so on. However, these primitives have orders
2758 smp_mb__before_atomic() orders all po-earlier events against2761 smp_mb__after_atomic() orders po-earlier atomic updates and2764 smp_mb__after_spinlock() orders po-earlier lock acquisition
9 - controlled by start/stop orders from a Host
8 * Generate coherence orders and handle lock operations
168 (* rb orders instructions just as pb does *)
49 for example two or three orders of magnitude longer than it took to collect.
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