| /tools/testing/selftests/kvm/x86/ |
| A D | vmx_msrs_test.c | 24 vcpu_set_msr(vcpu, msr_index, val & ~BIT_ULL(bit)); in vmx_fixed1_msr_test()
25 vcpu_set_msr(vcpu, msr_index, val); in vmx_fixed1_msr_test()
38 vcpu_set_msr(vcpu, msr_index, val | BIT_ULL(bit)); in vmx_fixed0_msr_test()
39 vcpu_set_msr(vcpu, msr_index, val); in vmx_fixed0_msr_test()
51 vcpu_set_msr(vcpu, MSR_IA32_VMX_VMCS_ENUM, 0); in vmx_save_restore_msrs_test()
52 vcpu_set_msr(vcpu, MSR_IA32_VMX_VMCS_ENUM, -1ull); in vmx_save_restore_msrs_test()
79 vcpu_set_msr(vcpu, MSR_IA32_FEAT_CTL, val | msr_bit | FEAT_CTL_LOCKED); in __ia32_feature_control_msr_test()
80 vcpu_set_msr(vcpu, MSR_IA32_FEAT_CTL, (val & ~msr_bit) | FEAT_CTL_LOCKED); in __ia32_feature_control_msr_test()
81 vcpu_set_msr(vcpu, MSR_IA32_FEAT_CTL, val | msr_bit | FEAT_CTL_LOCKED); in __ia32_feature_control_msr_test()
82 vcpu_set_msr(vcpu, MSR_IA32_FEAT_CTL, (val & ~msr_bit) | FEAT_CTL_LOCKED); in __ia32_feature_control_msr_test()
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| A D | vmx_pmu_caps_test.c | 88 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities); in KVM_ONE_VCPU_TEST()
106 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities); in KVM_ONE_VCPU_TEST()
125 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, 0); in KVM_ONE_VCPU_TEST()
126 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities); in KVM_ONE_VCPU_TEST()
135 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, BIT_ULL(bit)); in KVM_ONE_VCPU_TEST()
136 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, in KVM_ONE_VCPU_TEST()
139 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities); in KVM_ONE_VCPU_TEST()
201 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities); in KVM_ONE_VCPU_TEST()
202 vcpu_set_msr(vcpu, MSR_LBR_TOS, 7); in KVM_ONE_VCPU_TEST()
215 vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, host_cap.capabilities); in KVM_ONE_VCPU_TEST()
[all …]
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| A D | recalc_apic_map_test.c | 58 vcpu_set_msr(vcpus[i], MSR_IA32_APICBASE, LAPIC_X2APIC); in main()
64 vcpu_set_msr(vcpuN, MSR_IA32_APICBASE, LAPIC_X2APIC); in main()
65 vcpu_set_msr(vcpuN, MSR_IA32_APICBASE, LAPIC_DISABLED); in main()
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| A D | tsc_msrs_test.c | 125 vcpu_set_msr(vcpu, MSR_IA32_TSC, HOST_ADJUST + val); in main()
131 vcpu_set_msr(vcpu, MSR_IA32_TSC_ADJUST, UNITY * 123456); in main()
136 vcpu_set_msr(vcpu, MSR_IA32_TSC_ADJUST, val); in main()
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| A D | xss_msr_test.c | 32 vcpu_set_msr(vcpu, MSR_IA32_XSS, xss_val); in main()
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| A D | hwcr_msr_test.c | 30 vcpu_set_msr(vcpu, MSR_K7_HWCR, 0); in test_hwcr_bit()
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| A D | platform_info_test.c | 53 vcpu_set_msr(vcpu, MSR_PLATFORM_INFO, in main()
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| A D | feature_msrs_test.c | 76 vcpu_set_msr(vcpu, msr, supported_mask); in test_feature_msr()
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| A D | tsc_scaling_sync.c | 57 vcpu_set_msr(vcpu, MSR_IA32_TSC, TEST_TSC_OFFSET); in run_vcpu()
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| A D | xapic_state_test.c | 150 vcpu_set_msr(vcpu, MSR_IA32_APICBASE, apic_base); in __test_apic_id()
206 vcpu_set_msr(vcpu, MSR_IA32_APICBASE, MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE); in test_x2apic_id()
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| A D | hyperv_ipi.c | 262 vcpu_set_msr(vcpu[1], HV_X64_MSR_VP_INDEX, RECEIVER_VCPU_ID_1); in main()
267 vcpu_set_msr(vcpu[2], HV_X64_MSR_VP_INDEX, RECEIVER_VCPU_ID_2); in main()
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| A D | smm_test.c | 152 vcpu_set_msr(vcpu, MSR_IA32_SMBASE, SMRAM_GPA); in main()
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| A D | hyperv_svm_test.c | 172 vcpu_set_msr(vcpu, HV_X64_MSR_VP_INDEX, vcpu->id); in main()
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| A D | hyperv_evmcs.c | 258 vcpu_set_msr(vcpu, HV_X64_MSR_VP_INDEX, vcpu->id); in main()
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| A D | hyperv_tlb_flush.c | 638 vcpu_set_msr(vcpu[1], HV_X64_MSR_VP_INDEX, WORKER_VCPU_ID_1); in main()
643 vcpu_set_msr(vcpu[2], HV_X64_MSR_VP_INDEX, WORKER_VCPU_ID_2); in main()
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| A D | pmu_counters_test.c | 101 vcpu_set_msr(*vcpu, MSR_IA32_PERF_CAPABILITIES, perf_capabilities); in pmu_vm_create_with_one_vcpu()
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| /tools/testing/selftests/kvm/ |
| A D | steal_time.c | 82 vcpu_set_msr(vcpu, MSR_KVM_STEAL_TIME, (ulong)st_gva[i] | KVM_MSR_ENABLED); in steal_time_init()
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| /tools/testing/selftests/kvm/include/x86/ |
| A D | processor.h | 1139 #define vcpu_set_msr(vcpu, msr, val) \ macro
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