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Searched defs:input_rate (Results 1 – 5 of 5) sorted by relevance

/drivers/clk/mmp/
A Dclk-pll.c24 unsigned long input_rate; member
104 unsigned long input_rate, in mmp_clk_register_pll()
A Dclk.h231 unsigned long input_rate; member
/drivers/clk/tegra/
A Dclk-pll.c959 unsigned long input_rate; in clk_plle_enable() local
1122 unsigned long flags = 0, input_rate; in clk_pllu_enable() local
1254 u16 tegra_pll_get_fixed_mdiv(struct clk_hw *hw, unsigned long input_rate) in tegra_pll_get_fixed_mdiv()
1453 unsigned long input_rate, u32 n) in _pllcx_update_dynamic_coef()
1616 unsigned long input_rate; in clk_plle_tegra114_enable() local
1745 unsigned long flags = 0, input_rate; in clk_pllu_tegra114_enable() local
2455 unsigned long input_rate; in clk_plle_tegra210_enable() local
A Dclk-tegra210.c1111 unsigned long input_rate; in pllx_get_dyn_steps() local
1480 unsigned long rate, unsigned long input_rate) in tegra210_pll_fixed_mdiv_cfg()
A Dclk.h165 unsigned long input_rate; member

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