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Searched defs:value (Results 1 – 25 of 2823) sorted by relevance

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/drivers/gpu/drm/meson/
A Dmeson_overlay.c42 #define VD_X_START(value) FIELD_PREP(GENMASK(14, 0), value) argument
43 #define VD_X_END(value) FIELD_PREP(GENMASK(30, 16), value) argument
46 #define VD_Y_START(value) FIELD_PREP(GENMASK(12, 0), value) argument
47 #define VD_Y_END(value) FIELD_PREP(GENMASK(28, 16), value) argument
50 #define VD_COLOR_MAP(value) FIELD_PREP(GENMASK(1, 0), value) argument
61 #define VD_H_END(value) FIELD_PREP(GENMASK(11, 0), value) argument
62 #define VD_H_START(value) FIELD_PREP(GENMASK(27, 16), \ argument
66 #define VD_V_END(value) FIELD_PREP(GENMASK(11, 0), value) argument
70 #define VD2_V_END(value) FIELD_PREP(GENMASK(11, 0), value) argument
74 #define VD_V_WIDTH(value) FIELD_PREP(GENMASK(11, 0), value) argument
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/drivers/net/wireless/realtek/rtw88/
A Dfw.h436 #define CHSW_INFO_SET_CH(pkt, value) \ argument
440 #define CHSW_INFO_SET_BW(pkt, value) \ argument
442 #define CHSW_INFO_SET_TIMEOUT(pkt, value) \ argument
449 #define CH_INFO_SET_CH(pkt, value) \ argument
451 #define CH_INFO_SET_PRI_CH_IDX(pkt, value) \ argument
453 #define CH_INFO_SET_BW(pkt, value) \ argument
455 #define CH_INFO_SET_TIMEOUT(pkt, value) \ argument
457 #define CH_INFO_SET_ACTION_ID(pkt, value) \ argument
462 #define EXTRA_CH_INFO_SET_ID(pkt, value) \ argument
619 #define SET_SCAN_START(h2c_pkt, value) \ argument
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/drivers/video/fbdev/riva/
A Dnvreg.h34 #define SetBF(mask,value) ((value) << (0?mask)) argument
51 #define DEVICE_DEF(device,mask,value) \ argument
56 #define PDAC_Write(reg,value) DEVICE_WRITE(PDAC,reg,value) argument
59 #define PDAC_Def(mask,value) DEVICE_DEF(PDAC,mask,value) argument
63 #define PFB_Write(reg,value) DEVICE_WRITE(PFB,reg,value) argument
66 #define PFB_Def(mask,value) DEVICE_DEF(PFB,mask,value) argument
70 #define PRM_Write(reg,value) DEVICE_WRITE(PRM,reg,value) argument
73 #define PRM_Def(mask,value) DEVICE_DEF(PRM,mask,value) argument
87 #define PDMA_Def(mask,value) DEVICE_DEF(PDMA,mask,value) argument
144 #define PBUS_Def(mask,value) DEVICE_DEF(PBUS,mask,value) argument
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/drivers/net/wireless/realtek/rtw89/
A Dcam.h15 static inline void FWCMD_SET_ADDR_IDX(void *cmd, u32 value) in FWCMD_SET_ADDR_IDX()
20 static inline void FWCMD_SET_ADDR_OFFSET(void *cmd, u32 value) in FWCMD_SET_ADDR_OFFSET()
25 static inline void FWCMD_SET_ADDR_LEN(void *cmd, u32 value) in FWCMD_SET_ADDR_LEN()
30 static inline void FWCMD_SET_ADDR_VALID(void *cmd, u32 value) in FWCMD_SET_ADDR_VALID()
50 static inline void FWCMD_SET_ADDR_BB_SEL(void *cmd, u32 value) in FWCMD_SET_ADDR_BB_SEL()
80 static inline void FWCMD_SET_ADDR_SMA0(void *cmd, u32 value) in FWCMD_SET_ADDR_SMA0()
85 static inline void FWCMD_SET_ADDR_SMA1(void *cmd, u32 value) in FWCMD_SET_ADDR_SMA1()
90 static inline void FWCMD_SET_ADDR_SMA2(void *cmd, u32 value) in FWCMD_SET_ADDR_SMA2()
95 static inline void FWCMD_SET_ADDR_SMA3(void *cmd, u32 value) in FWCMD_SET_ADDR_SMA3()
100 static inline void FWCMD_SET_ADDR_SMA4(void *cmd, u32 value) in FWCMD_SET_ADDR_SMA4()
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/drivers/net/wwan/t7xx/
A Dt7xx_dpmaif.c136 u32 value; in t7xx_update_dlq_intr() local
145 u32 value, q_done; in t7xx_mask_dlq_intr() local
396 u32 value; in t7xx_dpmaif_sram_init() local
742 u32 value; in t7xx_dpmaif_dl_dlq_pit_init_done() local
881 u32 value; in t7xx_dpmaif_ul_rdy_en() local
896 u32 value; in t7xx_dpmaif_ul_arb_en() local
1039 u32 value; in t7xx_dpmaif_dl_dlq_pit_get_wr_idx() local
1048 u32 value; in t7xx_dl_add_timedout() local
1078 u32 value; in t7xx_dpmaif_dl_get_bat_rd_idx() local
1086 u32 value; in t7xx_dpmaif_dl_get_bat_wr_idx() local
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/drivers/net/ethernet/sfc/falcon/
A Dio.h67 static inline void _ef4_writeq(struct ef4_nic *efx, __le64 value, in _ef4_writeq()
78 static inline void _ef4_writed(struct ef4_nic *efx, __le32 value, in _ef4_writed()
113 const ef4_qword_t *value, unsigned int index) in ef4_sram_writeq()
145 static inline void ef4_reado(struct ef4_nic *efx, ef4_oword_t *value, in ef4_reado()
164 ef4_qword_t *value, unsigned int index) in ef4_sram_readq()
195 ef4_writeo_table(struct ef4_nic *efx, const ef4_oword_t *value, in ef4_writeo_table()
235 #define ef4_writeo_page(efx, value, reg, page) \ argument
245 _ef4_writed_page(struct ef4_nic *efx, const ef4_dword_t *value, in _ef4_writed_page()
250 #define ef4_writed_page(efx, value, reg, page) \ argument
266 const ef4_dword_t *value, in _ef4_writed_page_locked()
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/drivers/net/ethernet/sfc/siena/
A Dio.h84 static inline void _efx_writeq(struct efx_nic *efx, __le64 value, in _efx_writeq()
95 static inline void _efx_writed(struct efx_nic *efx, __le32 value, in _efx_writed()
130 const efx_qword_t *value, unsigned int index) in efx_sram_writeq()
162 static inline void efx_reado(struct efx_nic *efx, efx_oword_t *value, in efx_reado()
181 efx_qword_t *value, unsigned int index) in efx_sram_readq()
212 efx_writeo_table(struct efx_nic *efx, const efx_oword_t *value, in efx_writeo_table()
258 #define efx_writeo_page(efx, value, reg, page) \ argument
268 _efx_writed_page(struct efx_nic *efx, const efx_dword_t *value, in _efx_writed_page()
273 #define efx_writed_page(efx, value, reg, page) \ argument
291 const efx_dword_t *value, in _efx_writed_page_locked()
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/drivers/net/ethernet/microchip/vcap/
A Dvcap_api_client.h24 u8 value; member
29 u32 value; member
34 u8 value[6]; member
39 u8 value[7]; member
44 u8 value[8]; member
49 u8 value[9]; member
54 u8 value[14]; member
59 u8 value[16]; member
91 u8 value; member
95 u32 value; member
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/drivers/gpu/drm/amd/display/dc/dce110/
A Ddce110_opp_csc_v.c127 uint32_t value = 0; in program_color_matrix_v() local
145 uint32_t value = 0; in program_color_matrix_v() local
163 uint32_t value = 0; in program_color_matrix_v() local
181 uint32_t value = 0; in program_color_matrix_v() local
199 uint32_t value = 0; in program_color_matrix_v() local
217 uint32_t value = 0; in program_color_matrix_v() local
241 uint32_t value = 0; in program_color_matrix_v() local
259 uint32_t value = 0; in program_color_matrix_v() local
277 uint32_t value = 0; in program_color_matrix_v() local
295 uint32_t value = 0; in program_color_matrix_v() local
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A Ddce110_timing_generator.c95 uint32_t value = 0; in dce110_timing_generator_is_in_vertical_blank() local
128 uint32_t value = 0; in dce110_timing_generator_enable_crtc() local
536 uint32_t value; in dce110_timing_generator_get_position() local
614 uint32_t value = 0; in dce110_timing_generator_program_blanking() local
712 uint32_t value; in dce110_timing_generator_set_test_pattern() local
1221 uint32_t value; in dce110_timing_generator_setup_global_swap_lock() local
1322 uint32_t value; in dce110_timing_generator_tear_down_global_swap_lock() local
1493 uint32_t value; in dce110_timing_generator_enable_reset_trigger() local
1583 uint32_t value = 0; in dce110_timing_generator_enable_crtc_reset() local
1713 uint32_t value; in dce110_timing_generator_disable_reset_trigger() local
[all …]
A Ddce110_timing_generator_v.c59 uint32_t value; in dce110_timing_generator_v_enable_crtc() local
82 uint32_t value; in dce110_timing_generator_v_disable_crtc() local
102 uint32_t value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_v_blank_crtc() local
122 uint32_t value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_v_unblank_crtc() local
143 uint32_t value = 0; in dce110_timing_generator_v_is_in_vertical_blank() local
154 uint32_t value; in dce110_timing_generator_v_is_counter_moving() local
254 uint32_t value = 0; in dce110_timing_generator_v_program_blanking() local
389 uint32_t value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_v_enable_advanced_request() local
456 uint32_t value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_v_program_blank_color() local
483 uint32_t value = 0; in dce110_timing_generator_v_set_overscan_color_black() local
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/drivers/media/platform/allegro-dvt/
A Dnal-rbsp.c99 static inline int rbsp_write_bit(struct rbsp *rbsp, bool value) in rbsp_write_bit()
165 static int rbsp_read_uev(struct rbsp *rbsp, unsigned int *value) in rbsp_read_uev()
188 static int rbsp_write_uev(struct rbsp *rbsp, unsigned int *value) in rbsp_write_uev()
205 static int rbsp_read_sev(struct rbsp *rbsp, int *value) in rbsp_read_sev()
224 static int rbsp_write_sev(struct rbsp *rbsp, int *value) in rbsp_write_sev()
239 static int __rbsp_write_bit(struct rbsp *rbsp, int *value) in __rbsp_write_bit()
256 static int __rbsp_read_bit(struct rbsp *rbsp, int *value) in __rbsp_read_bit()
274 void rbsp_bit(struct rbsp *rbsp, int *value) in rbsp_bit()
281 void rbsp_bits(struct rbsp *rbsp, int n, int *value) in rbsp_bits()
288 void rbsp_uev(struct rbsp *rbsp, unsigned int *value) in rbsp_uev()
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/drivers/net/ethernet/stmicro/stmmac/
A Ddwxgmac2_dma.c13 u32 value = readl(ioaddr + XGMAC_DMA_MODE); in dwxgmac2_dma_reset() local
25 u32 value = readl(ioaddr + XGMAC_DMA_SYSBUS_MODE); in dwxgmac2_dma_init() local
55 u32 value; in dwxgmac2_dma_init_rx_chan() local
72 u32 value; in dwxgmac2_dma_init_tx_chan() local
86 u32 value = readl(ioaddr + XGMAC_DMA_SYSBUS_MODE); in dwxgmac2_dma_axi() local
286 u32 value; in dwxgmac2_dma_start_tx() local
300 u32 value; in dwxgmac2_dma_stop_tx() local
314 u32 value; in dwxgmac2_dma_start_rx() local
328 u32 value; in dwxgmac2_dma_stop_rx() local
565 u32 value; in dwxgmac2_set_bfsize() local
[all …]
A Ddwxgmac2_core.c72 u32 value; in dwxgmac2_rx_ipc() local
88 u32 value; in dwxgmac2_rx_queue_enable() local
160 u32 value; in dwxgmac2_rx_queue_routing() local
190 u32 value; in dwxgmac2_prog_mtl_rx_algorithms() local
213 u32 value; in dwxgmac2_prog_mtl_tx_algorithms() local
278 u32 value; in dwxgmac2_config_cbs() local
401 u32 value; in dwxgmac2_set_umac_addr() local
434 u32 value; in dwxgmac2_set_lpi_mode() local
456 u32 value; in dwxgmac2_set_eee_pls() local
469 u32 value; in dwxgmac2_set_eee_timer() local
[all …]
A Ddwmac4_core.c139 u32 value; in dwmac4_tx_queue_priority() local
158 u32 value; in dwmac4_rx_queue_routing() local
252 u32 value; in dwmac4_map_mtl_dma() local
274 u32 value; in dwmac4_config_cbs() local
385 u32 value, mask; in dwmac4_set_lpi_mode() local
425 u32 value; in dwmac4_set_eee_pls() local
458 unsigned int value; in dwmac4_set_filter() local
707 u32 value; in dwmac4_debug() local
819 u32 value; in dwmac4_set_arp_offload() local
836 u32 value; in dwmac4_config_l3_filter() local
[all …]
A Ddwmac_lib.c19 u32 value = readl(ioaddr + DMA_BUS_MODE); in dwmac_dma_reset() local
39 u32 value = readl(ioaddr + DMA_CHAN_INTR_ENA(chan)); in dwmac_enable_dma_irq() local
52 u32 value = readl(ioaddr + DMA_CHAN_INTR_ENA(chan)); in dwmac_disable_dma_irq() local
65 u32 value = readl(ioaddr + DMA_CHAN_CONTROL(chan)); in dwmac_dma_start_tx() local
72 u32 value = readl(ioaddr + DMA_CHAN_CONTROL(chan)); in dwmac_dma_stop_tx() local
80 u32 value = readl(ioaddr + DMA_CHAN_CONTROL(chan)); in dwmac_dma_start_rx() local
87 u32 value = readl(ioaddr + DMA_CHAN_CONTROL(chan)); in dwmac_dma_stop_rx() local
214 u32 value = readl(ioaddr + DMA_INTR_ENA); in dwmac_dma_interrupt() local
270 u32 old_val, value; in stmmac_set_mac() local
/drivers/net/ethernet/sfc/
A Dio.h60 static inline void _efx_writeq(struct efx_nic *efx, __le64 value, in _efx_writeq()
71 static inline void _efx_writed(struct efx_nic *efx, __le32 value, in _efx_writed()
82 static inline void efx_writeo(struct efx_nic *efx, const efx_oword_t *value, in efx_writeo()
105 static inline void efx_writed(struct efx_nic *efx, const efx_dword_t *value, in efx_writed()
117 static inline void efx_reado(struct efx_nic *efx, efx_oword_t *value, in efx_reado()
135 static inline void efx_readd(struct efx_nic *efx, efx_dword_t *value, in efx_readd()
146 efx_writeo_table(struct efx_nic *efx, const efx_oword_t *value, in efx_writeo_table()
153 static inline void efx_reado_table(struct efx_nic *efx, efx_oword_t *value, in efx_reado_table()
192 #define efx_writeo_page(efx, value, reg, page) \ argument
202 _efx_writed_page(struct efx_nic *efx, const efx_dword_t *value, in _efx_writed_page()
[all …]
/drivers/gpu/drm/i915/gt/
A Dintel_mocs.c34 #define LE_LRUM(value) ((value) << 4) argument
35 #define LE_AOM(value) ((value) << 6) argument
36 #define LE_RSC(value) ((value) << 7) argument
37 #define LE_SCC(value) ((value) << 8) argument
38 #define LE_PFM(value) ((value) << 11) argument
39 #define LE_SCF(value) ((value) << 14) argument
40 #define LE_COS(value) ((value) << 15) argument
41 #define LE_SSE(value) ((value) << 17) argument
45 #define IG_PAT(value) ((value) << 8) argument
48 #define L3_ESC(value) ((value) << 0) argument
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/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/
A Ddr_ste_v1.c1238 static int dr_ste_v1_build_eth_l2_src_tag(struct mlx5dr_match_param *value, in dr_ste_v1_build_eth_l2_src_tag()
1271 static int dr_ste_v1_build_eth_l2_dst_tag(struct mlx5dr_match_param *value, in dr_ste_v1_build_eth_l2_dst_tag()
1321 static int dr_ste_v1_build_eth_l2_tnl_tag(struct mlx5dr_match_param *value, in dr_ste_v1_build_eth_l2_tnl_tag()
1435 static int dr_ste_v1_build_mpls_tag(struct mlx5dr_match_param *value, in dr_ste_v1_build_mpls_tag()
1459 static int dr_ste_v1_build_tnl_gre_tag(struct mlx5dr_match_param *value, in dr_ste_v1_build_tnl_gre_tag()
1486 static int dr_ste_v1_build_tnl_mpls_tag(struct mlx5dr_match_param *value, in dr_ste_v1_build_tnl_mpls_tag()
1613 static int dr_ste_v1_build_icmp_tag(struct mlx5dr_match_param *value, in dr_ste_v1_build_icmp_tag()
1676 static int dr_ste_v1_build_eth_l4_misc_tag(struct mlx5dr_match_param *value, in dr_ste_v1_build_eth_l4_misc_tag()
1734 dr_ste_v1_build_flex_parser_tnl_geneve_tag(struct mlx5dr_match_param *value, in dr_ste_v1_build_flex_parser_tnl_geneve_tag()
1783 static int dr_ste_v1_build_register_0_tag(struct mlx5dr_match_param *value, in dr_ste_v1_build_register_0_tag()
[all …]
A Ddr_ste_v0.c1007 dr_ste_v0_build_eth_l2_src_tag(struct mlx5dr_match_param *value, in dr_ste_v0_build_eth_l2_src_tag()
1043 dr_ste_v0_build_eth_l2_dst_tag(struct mlx5dr_match_param *value, in dr_ste_v0_build_eth_l2_dst_tag()
1096 dr_ste_v0_build_eth_l2_tnl_tag(struct mlx5dr_match_param *value, in dr_ste_v0_build_eth_l2_tnl_tag()
1218 dr_ste_v0_build_mpls_tag(struct mlx5dr_match_param *value, in dr_ste_v0_build_mpls_tag()
1244 dr_ste_v0_build_tnl_gre_tag(struct mlx5dr_match_param *value, in dr_ste_v0_build_tnl_gre_tag()
1275 dr_ste_v0_build_tnl_mpls_tag(struct mlx5dr_match_param *value, in dr_ste_v0_build_tnl_mpls_tag()
1406 dr_ste_v0_build_icmp_tag(struct mlx5dr_match_param *value, in dr_ste_v0_build_icmp_tag()
1496 dr_ste_v0_build_eth_l4_misc_tag(struct mlx5dr_match_param *value, in dr_ste_v0_build_eth_l4_misc_tag()
1584 dr_ste_v0_build_register_0_tag(struct mlx5dr_match_param *value, in dr_ste_v0_build_register_0_tag()
1610 dr_ste_v0_build_register_1_tag(struct mlx5dr_match_param *value, in dr_ste_v0_build_register_1_tag()
[all …]
/drivers/net/ethernet/microchip/sparx5/
A Dsparx5_vcap_debugfs.c16 static const char *sparx5_vcap_is0_etype_str(u32 value) in sparx5_vcap_is0_etype_str()
40 static const char *sparx5_vcap_is0_mpls_str(u32 value) in sparx5_vcap_is0_mpls_str()
64 static const char *sparx5_vcap_is0_mlbs_str(u32 value) in sparx5_vcap_is0_mlbs_str()
82 u32 value, val; in sparx5_vcap_is0_port_keys() local
125 u32 value; in sparx5_vcap_is2_port_keys() local
237 u32 value; in sparx5_vcap_is2_port_stickies() local
292 u32 value; in sparx5_vcap_es0_port_keys() local
331 u32 value; in sparx5_vcap_es2_port_keys() local
410 u32 value; in sparx5_vcap_es2_port_stickies() local
/drivers/usb/fotg210/
A Dfotg210-udc.c34 u32 value = ioread32(fotg210->reg + offset); in fotg210_ack_int() local
64 u32 value = ioread32(fotg210->reg + FOTG210_DCFESR); in fotg210_set_cxdone() local
188 u32 value; in fotg210_reset_tseq() local
268 u32 value; in fotg210_enable_dma() local
306 u32 value; in fotg210_wait_dma_done() local
458 u32 value; in fotg210_set_epnstall() local
479 u32 value; in fotg210_clear_epnstall() local
612 u32 value = ioread32(fotg210->reg + FOTG210_DAR); in fotg210_set_configuration() local
710 u32 value; in fotg210_is_epnstall() local
1009 u32 value; in fotg210_udc_start() local
[all …]
/drivers/gpu/drm/amd/amdgpu/
A Dsoc15_common.h40 #define __WREG32_SOC15_RLC__(reg, value, flag, hwip, inst) \ argument
82 #define WREG32_SOC15(ip, inst, reg, value) \ argument
86 #define WREG32_SOC15_IP(ip, reg, value) \ argument
89 #define WREG32_SOC15_IP_NO_KIQ(ip, reg, value, inst) \ argument
92 #define WREG32_SOC15_NO_KIQ(ip, inst, reg, value) \ argument
110 #define WREG32_RLC(reg, value) \ argument
113 #define WREG32_RLC_EX(prefix, reg, value, inst) \ argument
138 #define WREG32_SOC15_RLC_SHADOW(ip, inst, reg, value) \ argument
145 #define WREG32_RLC_NO_KIQ(reg, value, hwip) \ argument
172 #define WREG32_SOC15_RLC(ip, inst, reg, value) \ argument
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/drivers/xen/xen-pciback/
A Dconf_space_header.c26 #define is_enable_cmd(value) ((value)&(PCI_COMMAND_MEMORY|PCI_COMMAND_IO)) argument
27 #define is_master_cmd(value) ((value)&PCI_COMMAND_MASTER) argument
51 static int command_read(struct pci_dev *dev, int offset, u16 *value, void *data) in command_read()
62 static int command_write(struct pci_dev *dev, int offset, u16 value, void *data) in command_write()
127 static int rom_write(struct pci_dev *dev, int offset, u32 value, void *data) in rom_write()
160 static int bar_write(struct pci_dev *dev, int offset, u32 value, void *data) in bar_write()
196 static int bar_read(struct pci_dev *dev, int offset, u32 * value, void *data) in bar_read()
260 u16 *value, void *data) in xen_pcibk_read_vendor()
268 u16 *value, void *data) in xen_pcibk_read_device()
275 static int interrupt_read(struct pci_dev *dev, int offset, u8 * value, in interrupt_read()
[all …]
/drivers/crypto/intel/qat/qat_common/
A Dadf_gen2_hw_csr_data.c17 u32 value) in write_csr_ring_head()
28 u32 value) in write_csr_ring_tail()
39 u32 ring, u32 value) in write_csr_ring_config()
50 static void write_csr_int_flag(void __iomem *csr_base_addr, u32 bank, u32 value) in write_csr_int_flag()
61 u32 value) in write_csr_int_col_en()
67 u32 value) in write_csr_int_col_ctl()
73 u32 value) in write_csr_int_flag_and_col()
79 u32 value) in write_csr_ring_srv_arb_en()

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