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/arch/alpha/lib/
A Dev6-copy_user.S67 nop # E .. .. .. : U L U L
76 bne $3, $aligndest # U .. .. .. : U L U L
98 extqh $2,$17,$1 # U .. .. .. : U U L L
103 subq $0,8,$0 # E .. .. .. : U L L U
108 bne $4,$misquad # U .. .. .. : U L U L
134 blt $2, $onequad # U .. .. .. : U L U L
149 nop # E .. .. .. : U U L L
154 subq $0,16,$0 # E .. .. .. : U L L U
164 addq $17,16,$17 # E .. .. .. : U L L U
169 bgt $3,$unroll4 # U .. .. .. : U L U L
[all …]
A Dev6-clear_user.S54 beq $0, $zerolength # U .. .. .. : U L U L
61 beq $4, $headalign # U .. .. .. : U L U L
70 addq $16, 8, $16 # E .. .. .. : L U U L
75 subq $0, 8, $0 # E .. .. .. : U L U L
89 blt $4, $trailquad # U .. .. .. : U L U L
107 nop # E .. .. .. : U L U L
142 subq $0, 8, $0 # E .. .. .. : U L U L
147 subq $0, 16, $0 # E : U L L U
163 nop # E : U L U L
168 bge $4, $do_wh64 # U : U L U L
[all …]
A Dev6-divide.S115 stq $2, 8($30) # L : L U L U
120 LONGIFY(divisor) # E : U L L U
125 DIV_ONLY(stq tmp2,32($30)) # L : L U U L
147 bne compare,1b # U : U L U L
157 bne compare,1b # U : U L U L
179 nop # E : L U L U
184 bne mask,2b # U : U L U L
189 bne mask,2b # U : U L L U
195 nop # E : U U L L
208 ret $31,($23),1 # L0 : L U U L
[all …]
A Dev6-csum_ipv6_magic.S67 sll $19,8,$7 # U : U L U L : 0x00000000 00aabb00
72 ldq_u $2,0($17) # L : U L U L : Latency: 3
87 extqh $5,$6,$5 # U : L U L U
92 extqh $3,$6,$22 # U : L U L U :
97 extqh $23,$6,$23 # U : L U L U :
102 or $3,$23,$3 # E : U L U L : 2nd dst word complete
107 zap $4,0xa,$4 # U : U U L L : 0000000000CC00AA
112 addq $20,$2,$20 # E : U L U L
127 addq $20,$18,$20 # E : U L U L :
144 nop # E : L U L U
[all …]
A Dev6-memchr.S50 and $17, 0xff, $17 # E : L L U U : 00000000000000ch
55 lda $3, -1($31) # E : U L L U
60 sll $17, 32, $2 # U : U L L U : chchchch00000000
65 ldq_u $6, -1($5) # L : L U U L : eight or less bytes to search Latency=3
80 cmpbge $31, $1, $2 # E : L U L U
85 beq $2, $not_found # U : U L U L
96 ret # L0 : L U L U
120 ret # L0 : L U L U
136 subq $5, 1, $18 # E : U L U L
143 beq $2, $final # U : U L U L
[all …]
A Dev6-memcpy.S52 ldbu $1, 0($17) # L : grab a byte
55 stb $1, 0($16) # L :
68 ldq $1, 0($17) # L : get 8 bytes
73 stq $1, 0($16) # L : store
102 stq $6, 0($16) # L : bytes 0..7
116 ldq $6, 0($17) # L : bytes 0..7
146 ldq $1, 0($17) # L : fetch 8
151 stq $1, 0($16) # L : store 8
193 stb $1, 0($4) # L : store it
228 ldbu $1, 0($17) # L : fetch 1
[all …]
A Dev6-memset.S136 stq $17, 0($5) # L :
163 stq $17, 0($5) # L :
167 stq $17, 8($5) # L :
168 stq $17, 16($5) # L :
197 stq $17,0($5) # L :
208 ldq $7,0($5) # L :
314 stq $17, 0($5) # L :
341 stq $17, 0($5) # L :
345 stq $17, 8($5) # L :
386 ldq $7,0($5) # L :
[all …]
A Dev6-stxcpy.S74 stq_u t1, 0(a0) # L :
79 ldq_u t1, 0(a1) # L : Latency=3
98 ldq_u t0, 0(a0) # L : Latency=3
108 1: stq_u t1, 0(a0) # L :
129 ldq_u t1, 0(a1) # L : load first src word
134 ldq_u t0, 0(a0) # L :
155 ldq_u t2, 8(a1) # L :
258 1: stq_u t1, 0(a0) # L :
267 ldq_u t1, 0(a1) # L : load first source word
276 ldq_u t0, 0(a0) # L :
[all …]
A Dev67-strncat.S37 ldq_u $1, 0($16) # L : load first quadword ($16 may be misaligned)
50 $loop: ldq $1, 8($16) # L :
80 stq_u $1, 0($16) # L :
84 stb $31, 8($16) # L :
A Dev6-stxncpy.S90 stq_u t0, 0(a0) # L :
95 ldq_u t0, 0(a1) # L :
122 ldq_u t1, 0(a0) # L :
132 1: stq_u t0, 0(a0) # L :
167 ldq_u t1, 0(a1) # L : load first src word
171 ldq_u t0, 0(a0) # L :
301 ldq_u t1, 0(a0) # L :
311 1: stq_u t0, 0(a0) # L :
348 ldq_u t0, 0(a0) # L :
379 ldq_u t0, 0(a0) # L :
[all …]
/arch/m68k/kernel/
A Dhead.S371 #define L(name) .L##name macro
373 #define L(name) .L/**/name macro
405 L(\name):
847 L(gvtdone):
868 L(nothp):
887 L(nocon):
1042 L(notq40):
1088 L(not147):
1112 L(not16x):
1250 L(novirt):
[all …]
/arch/arm64/lib/
A Dmemcmp.S17 #define L(label) .L ## label macro
37 b.lo L(less8)
42 b.ne L(return)
49 b L(return)
51 L(more16):
55 bne L(return)
77 L(loop16):
105 L(return):
111 L(ret_eq):
118 L(less8):
[all …]
A Dstrncmp.S18 #define L(label) .L ## label macro
74 L(loop_aligned):
88 L(full_check):
123 L(not_limit):
148 L(end_quick):
158 L(mutual_align):
180 L(misaligned8):
184 L(byte_loop):
192 L(done):
209 b.ne L(done)
[all …]
A Dstrcmp.S18 #define L(label) .L ## label macro
66 L(loop_aligned):
86 L(end):
107 L(mutual_align):
121 L(misaligned8):
130 b.ne L(done)
134 L(src1_aligned):
146 b.ne L(tail)
172 L(tail):
183 b L(end)
[all …]
A Dmemchr.S20 #define L(label) .L ## label macro
44 cbz wordcnt, L(byte_loop)
48 L(word_loop):
55 b.ne L(found_word)
56 cbnz wordcnt, L(word_loop)
57 L(byte_loop):
58 cbz cntin, L(not_found)
62 b.ne L(byte_loop)
65 L(found_word):
71 L(not_found):
A Dmemcpy.S18 #define L(label) .L ## label macro
70 b.lo L(copy16)
78 L(copy16):
88 L(copy8):
97 L(copy4):
106 L(copy0):
111 L(copy32_128):
126 L(copy128):
135 L(copy96):
146 L(copy_long):
[all …]
A Dstrlen.S18 #define L(label) .L ## label macro
86 b.gt L(page_cross)
118 L(main_loop_entry):
121 L(main_loop):
123 L(page_cross_entry):
134 beq L(main_loop)
146 L(tail):
168 L(nonascii_loop):
177 bne L(tail)
187 b L(tail)
[all …]
/arch/arm64/crypto/
A Dsm3-ce-core.S17 .inst 0xce60c000 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
21 .inst 0xce60c400 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
25 .inst 0xce400000 | .L\rd | (.L\rn << 5) | (.L\ra << 10) | (.L\rm << 16)
29 .inst 0xce408000 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
33 .inst 0xce408400 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
37 .inst 0xce408800 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
41 .inst 0xce408c00 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
A Dsha3-ce-core.S24 .inst 0xce000000 | .L\rd | (.L\rn << 5) | (.L\ra << 10) | (.L\rm << 16)
28 .inst 0xce608c00 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
32 .inst 0xce200000 | .L\rd | (.L\rn << 5) | (.L\ra << 10) | (.L\rm << 16)
36 .inst 0xce800000 | .L\rd | (.L\rn << 5) | ((\imm6) << 10) | (.L\rm << 16)
/arch/arm/kernel/
A Diwmmxt.h19 .inst 0xedd00100 | (.L\reg << 12) | (.L\base << 16) | (\offset >> 2)
23 .inst 0xfd900100 | (.L\reg << 12) | (.L\base << 16) | (\offset >> 2)
27 .inst 0xedc00100 | (.L\reg << 12) | (.L\base << 16) | (\offset >> 2)
31 .inst 0xfd800100 | (.L\reg << 12) | (.L\base << 16) | (\offset >> 2)
/arch/csky/abiv2/
A Dsysdep.h14 #define BNEZAD(R, L) \ argument
15 bnezad R, L
23 #define BNEZAD(R, L) \ argument
24 bnez R, L
/arch/parisc/include/asm/
A Dpdcpat.h16 #define PDC_PAT_CELL_GET_NUMBER 0L /* Return Cell number */
66 #define PDC_PAT_CHASSIS_WRITE_LOG 0L /* Write Log Entry */
77 #define PDC_PAT_CPU_INFO 0L /* Return CPU config info */
93 #define PDC_PAT_EVENT_GET_CAPS 0L /* Get Capabilities */
104 #define PDC_PAT_HPMC_RENDEZ_CPU 0L /* go into spin loop */
147 #define PDC_PAT_MEM_PD_INFO 0L /* Return PDT info for PD */
172 #define PDC_PAT_NVOLATILE_READ 0L /* Read Non-Volatile Memory */
180 #define PDC_PAT_PD_GET_ADDR_MAP 0L /* Get Address Map */
206 #define PDC_PAT_TOC_REGISTER_VECTOR 0L /* Register TOC Vector */
/arch/mips/cavium-octeon/executive/
A Dcvmx-l2c.c482 return tag.s.L; in cvmx_l2c_unlock_line()
499 return tag.s.L; in cvmx_l2c_unlock_line()
532 __BITFIELD_FIELD(uint64_t L:1, /* Line locked */
541 __BITFIELD_FIELD(uint64_t L:1, /* Line locked */
550 __BITFIELD_FIELD(uint64_t L:1, /* Line locked */
681 tag.s.L = l2c_tadx_tag.s.lock; in cvmx_l2c_get_tag()
696 tag.s.L = tmp_tag.cn58xx.L; in cvmx_l2c_get_tag()
702 tag.s.L = tmp_tag.cn38xx.L; in cvmx_l2c_get_tag()
708 tag.s.L = tmp_tag.cn31xx.L; in cvmx_l2c_get_tag()
714 tag.s.L = tmp_tag.cn30xx.L; in cvmx_l2c_get_tag()
[all …]
/arch/parisc/kernel/
A Dhpmc.S153 ldil L%PA(os_hpmc_2), rp
168 ldil L%PA(os_hpmc_3),rp
198 ldil L%PA(os_hpmc_4),rp
220 ldil L%PA(os_hpmc_5),rp
268 ldil L%PA(os_hpmc_6),rp
283 ldil L%0xfffc0000,%r4 /* IO_BROADCAST */
/arch/alpha/include/asm/
A Dswitch_to.h9 #define switch_to(P,N,L) \ argument
11 (L) = alpha_switch_to(virt_to_phys(&task_thread_info(N)->pcb), (P)); \

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