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Searched refs:MIDR_ALL_VERSIONS (Results 1 – 5 of 5) sorted by relevance

/arch/arm64/kernel/
A Dcpu_errata.c324 MIDR_ALL_VERSIONS(MIDR_THUNDERX),
327 MIDR_ALL_VERSIONS(MIDR_OCTX2_98XX),
328 MIDR_ALL_VERSIONS(MIDR_OCTX2_96XX),
329 MIDR_ALL_VERSIONS(MIDR_OCTX2_95XX),
535 MIDR_ALL_VERSIONS(MIDR_CORTEX_X1),
537 MIDR_ALL_VERSIONS(MIDR_CORTEX_X2),
538 MIDR_ALL_VERSIONS(MIDR_CORTEX_X3),
539 MIDR_ALL_VERSIONS(MIDR_CORTEX_X4),
554 MIDR_ALL_VERSIONS(MIDR_AMPERE1),
555 MIDR_ALL_VERSIONS(MIDR_AMPERE1A),
[all …]
A Dproton-pack.c158 MIDR_ALL_VERSIONS(MIDR_CORTEX_A35), in spectre_v2_get_cpu_hw_mitigation_state()
159 MIDR_ALL_VERSIONS(MIDR_CORTEX_A53), in spectre_v2_get_cpu_hw_mitigation_state()
160 MIDR_ALL_VERSIONS(MIDR_CORTEX_A55), in spectre_v2_get_cpu_hw_mitigation_state()
161 MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53), in spectre_v2_get_cpu_hw_mitigation_state()
162 MIDR_ALL_VERSIONS(MIDR_HISI_TSV110), in spectre_v2_get_cpu_hw_mitigation_state()
328 MIDR_ALL_VERSIONS(MIDR_CORTEX_A57), in has_spectre_v3a()
329 MIDR_ALL_VERSIONS(MIDR_CORTEX_A72), in has_spectre_v3a()
880 MIDR_ALL_VERSIONS(MIDR_CORTEX_X3), in spectre_bhb_loop_affected()
893 MIDR_ALL_VERSIONS(MIDR_CORTEX_X1), in spectre_bhb_loop_affected()
896 MIDR_ALL_VERSIONS(MIDR_CORTEX_X2), in spectre_bhb_loop_affected()
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A Dcpufeature.c1795 MIDR_ALL_VERSIONS(MIDR_BRCM_VULCAN), in unmap_kernel_at_el0()
1796 MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53), in unmap_kernel_at_el0()
1797 MIDR_ALL_VERSIONS(MIDR_CORTEX_A35), in unmap_kernel_at_el0()
1798 MIDR_ALL_VERSIONS(MIDR_CORTEX_A53), in unmap_kernel_at_el0()
1799 MIDR_ALL_VERSIONS(MIDR_CORTEX_A55), in unmap_kernel_at_el0()
1800 MIDR_ALL_VERSIONS(MIDR_CORTEX_A57), in unmap_kernel_at_el0()
1801 MIDR_ALL_VERSIONS(MIDR_CORTEX_A72), in unmap_kernel_at_el0()
1802 MIDR_ALL_VERSIONS(MIDR_CORTEX_A73), in unmap_kernel_at_el0()
1803 MIDR_ALL_VERSIONS(MIDR_HISI_TSV110), in unmap_kernel_at_el0()
1804 MIDR_ALL_VERSIONS(MIDR_NVIDIA_CARMEL), in unmap_kernel_at_el0()
[all …]
/arch/arm64/kvm/vgic/
A Dvgic-v3.c617 MIDR_ALL_VERSIONS(MIDR_APPLE_M1_ICESTORM),
618 MIDR_ALL_VERSIONS(MIDR_APPLE_M1_FIRESTORM),
619 MIDR_ALL_VERSIONS(MIDR_APPLE_M1_ICESTORM_PRO),
620 MIDR_ALL_VERSIONS(MIDR_APPLE_M1_FIRESTORM_PRO),
621 MIDR_ALL_VERSIONS(MIDR_APPLE_M1_ICESTORM_MAX),
622 MIDR_ALL_VERSIONS(MIDR_APPLE_M1_FIRESTORM_MAX),
623 MIDR_ALL_VERSIONS(MIDR_APPLE_M2_BLIZZARD),
624 MIDR_ALL_VERSIONS(MIDR_APPLE_M2_AVALANCHE),
625 MIDR_ALL_VERSIONS(MIDR_APPLE_M2_BLIZZARD_PRO),
626 MIDR_ALL_VERSIONS(MIDR_APPLE_M2_AVALANCHE_PRO),
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/arch/arm64/include/asm/
A Dcputype.h288 #define MIDR_ALL_VERSIONS(m) MIDR_RANGE(m, 0, 0, 0xf, 0xf) macro

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