| /arch/loongarch/include/asm/ |
| A D | inst.h | 532 insn->reg0i15_format.opcode = OP; \ 551 insn->reg0i26_format.opcode = OP; \ in DEF_EMIT_REG0I15_FORMAT() 563 insn->reg1i20_format.opcode = OP; \ 577 insn->reg2_format.opcode = OP; \ 594 insn->reg2i5_format.opcode = OP; \ 610 insn->reg2i6_format.opcode = OP; \ 626 insn->reg2i12_format.opcode = OP; \ 656 insn->reg2i14_format.opcode = OP; \ 677 insn->reg2i16_format.opcode = OP; \ 723 insn->reg3_format.opcode = OP; \ [all …]
|
| /arch/powerpc/xmon/ |
| A D | ppc-opc.c | 2299 #define OP(x) ((((unsigned long)(x)) & 0x3f) << 26) macro 2300 #define OP_MASK OP (0x3f) 2428 #define DQX(op, xop) (OP (op) | ((xop) & 0x7)) 2432 #define DSO(op, xop) (OP (op) | ((xop) & 0x3)) 2460 #define M(op, rc) (OP (op) | ((rc) & 1)) 4612 {"nop", OP(24), 0xffffffff, PPCCOM, PPCVLE, {0}}, 4619 {"xnop", OP(26), 0xffffffff, PPCCOM, PPCVLE, {0}}, 7053 {"e_la", OP(7), OP_MASK, PPCVLE, 0, {RT, D, RA0}}, 7064 {"e_lbz", OP(12), OP_MASK, PPCVLE, 0, {RT, D, RA0}}, 7065 {"e_stb", OP(13), OP_MASK, PPCVLE, 0, {RT, D, RA0}}, [all …]
|
| /arch/sh/math-emu/ |
| A D | math.c | 78 #define CMP(OP) ({ int r; BOTH_PRmn(OP##_X,r); r; }) argument 101 #define ARITH_X(SZ,OP,M,N) do{ \ argument 104 FP_##OP##_##SZ(Fr, Fn, Fm); \
|
| /arch/powerpc/perf/ |
| A D | isa207-common.c | 359 dsrc->val |= P(OP, LOAD); in isa207_get_mem_data_src() 362 dsrc->val |= P(OP, STORE); in isa207_get_mem_data_src() 365 dsrc->val |= P(OP, NA); in isa207_get_mem_data_src() 369 dsrc->val |= (val == 1) ? P(OP, LOAD) : P(OP, STORE); in isa207_get_mem_data_src()
|
| /arch/alpha/include/asm/ |
| A D | sfp-machine.h | 55 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ argument
|
| /arch/sh/include/asm/ |
| A D | sfp-machine.h | 53 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ argument
|
| /arch/sparc/include/asm/ |
| A D | sfp-machine_64.h | 59 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ argument
|
| A D | sfp-machine_32.h | 61 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ argument
|
| /arch/mips/include/asm/ |
| A D | mipsregs.h | 1459 #define _ASM_MACRO_1R(OP, R1, ENC) \ argument 1460 ".macro " #OP " " #R1 "\n\t" \ 1468 #define _ASM_MACRO_1R1I(OP, R1, I2, ENC) \ argument 1469 ".macro " #OP " " #R1 ", " #I2 "\n\t" \ 1477 #define _ASM_MACRO_2R(OP, R1, R2, ENC) \ argument 1478 ".macro " #OP " " #R1 ", " #R2 "\n\t" \ 1487 #define _ASM_MACRO_3R(OP, R1, R2, R3, ENC) \ argument 1488 ".macro " #OP " " #R1 ", " #R2 ", " #R3 "\n\t" \ 1498 #define _ASM_MACRO_2R_1S(OP, R1, R2, SEL3, ENC) \ argument 1499 ".macro " #OP " " #R1 ", " #R2 ", " #SEL3 " = 0\n\t" \
|
| /arch/sparc/net/ |
| A D | bpf_jit_comp_32.c | 28 #define OP(X) ((X) << 30) macro 32 #define F1(X) OP(X) 33 #define F2(X, Y) (OP(X) | OP2(Y)) 34 #define F3(X, Y) (OP(X) | OP3(Y))
|
| A D | bpf_jit_comp_64.c | 57 #define OP(X) ((X) << 30) macro 62 #define F1(X) OP(X) 63 #define F2(X, Y) (OP(X) | OP2(Y)) 64 #define F3(X, Y) (OP(X) | OP3(Y))
|
| /arch/arm/boot/dts/st/ |
| A D | stm32mp157f-dk2.dts | 84 /* I2C4 is managed by OP-TEE */
|
| /arch/x86/events/intel/ |
| A D | ds.c | 84 #define OP_LH (P(OP, LOAD) | P(LVL, HIT)) 91 P(OP, LOAD) | P(LVL, MISS) | LEVEL(L3) | P(SNOOP, NA),/* 0x00:ukn L3 */ 199 P(OP, LOAD) | P(LVL, MISS) | LEVEL(L3) | P(SNOOP, NA), /* 0x00: ukn L3 */ 214 …P(OP, LOAD) | P(LVL, MISS) | P(LVL, L3) | LEVEL(L3) | P(SNOOP, HITM), /* 0x0f: L3 Miss Snoop HitM… 234 u64 val = P(OP, STORE) | P(SNOOP, NA) | P(LVL, L1) | P(TLB, L2); in precise_store_data() 369 val = P(OP, LOAD) | LEVEL(NA) | P(SNOOP, NA); in lnc_latency_data() 388 src.mem_op = P(OP, STORE); in lnc_latency_data() 484 src.mem_op = P(OP,STORE); in store_latency_data()
|
| /arch/powerpc/include/asm/ |
| A D | sfp-machine.h | 144 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ argument
|
| A D | cpm2.h | 76 #define mk_cr_cmd(PG, SBC, MCN, OP) \ argument 77 ((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
|
| /arch/arm/mach-tegra/ |
| A D | sleep-tegra30.S | 549 mov32 r2, 0x800A00AB @ DEV_SELECTION=2, MA=10, OP=0xAB 559 mov32 r2, 0x400A00AB @ DEV_SELECTION=1, MA=10, OP=0xAB
|
| /arch/arm64/boot/dts/mediatek/ |
| A D | mt8195-demo.dts | 60 * 12 MiB reserved for OP-TEE (BL32)
|
| A D | mt8365-evk.dts | 107 /* 12 MiB reserved for OP-TEE (BL32)
|
| /arch/arm64/boot/dts/freescale/ |
| A D | imx8mm-innocomm-wb15.dtsi | 289 /delete-node/ &sec_jr1; /* Job ring in use by OP-TEE */
|
| /arch/arm64/boot/dts/ti/ |
| A D | k3-am64-phycore-som.dtsi | 39 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
|
| A D | k3-am62-phycore-som.dtsi | 86 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
|
| A D | k3-am62a-phycore-som.dtsi | 105 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
|
| A D | k3-am62d2-evm.dts | 99 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
|
| /arch/sparc/kernel/ |
| A D | fpu_traps.S | 223 cmp %g1, 2 ! Unfinished FP-OP
|
| /arch/arm64/boot/dts/hisilicon/ |
| A D | hi6220-hikey.dts | 37 * 0x3e00,0000 - 0x3fff,ffff: OP-TEE
|